dwc_comp_ts07neg42p11sadrl128s

Description:	Two Port, High Density Register File 128K Sync Compiler, TSMC 7FF Plus FinFET P-Optional Vt/Cell Std Vt Process
Name:	dwc_comp_ts07neg42p11sadrl128s
Version:	a04p1
ECCN:	EAR99/NLR
STARs:	Open and/or Closed STARs
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Product Type:	DesignWare Embedded Memory IP
Documentation:	Show Documents... Hide Documents... Application Notes TSMC N7 Memory Compilers Compiler Modes ( PDF ) TSMC N7 and Smaller Geometries Memory Compilers CMM Plugin ( PDF ) Verilog User Guide ( PDF ) User Guide SiWare Two Port High Density Leakage Control Register File 128K Sync Compiler For TSMC 7nm Plus FinFET P-Optional Vt/Cell Std Vt Process ( PDF )
Download:	v-comp_ts07neg42p11sadrl128s
Product Code:	D121-0, D819-0, D820-0