- Silicon Design & Verification
- Silicon IP
- Software Integrity
- About Us
- Silicon Design & Verification Products
- Solutions
- Resources
- Services
- Community
- Training
- Silicon IP Products
- Solutions
- Resources
- Services
- Community
- Software Integrity
- Tools & Services
- Training & Education
- Solutions
- Resources
- Support
- Partners
- About Us
< Silicon Design & Verification Products
< Silicon Design & Verification Products
< Silicon Design & Verification Products
< Silicon Design & Verification Products
3D Image Processing
Simpleware Products
Simpleware for Life Sciences
Simpleware for Materials & Manufacturing
< Silicon Design & Verification Products
< Silicon Design & Verification Products
< Silicon Design & Verification Products
Photonic Solutions
PIC Design Suite
< overview
Silicon Design & Verification Products
+
Design
+
System Simulation & Modeling
+
Verification Continuum
+
3D Image Processing
+
Silicon Engineering
+
Optical Solutions
+
Photonic Solutions
< Solutions
< Solutions
< Solutions
< Solutions
< overview
< Resources
< Resources
< Resources
< overview
< Services
< Services
< Services
< Community
Community
Community Overview
< Community
< Community
< Community
< Community
< Community
< Community
< Community
< overview
Community
+
Community
+
SNUG
+
Partners
+
EmbARC.org
+
Interoperability
+
Academic Programs
+
Company Blogs
+
BSIMM
< Training
< overview
< main menu
< Silicon IP Products
< Silicon IP Products
Memories & Libraries
Logic Libraries
Memory Compliers
Duet Packages
HPC Design Kit
Embedded Test & Repair
Non-Volatile Memory
< Silicon IP Products
< Silicon IP Products
Processor Solutions
ARC Processor IP
Embedded Vision Processor IP
Development Tools
Operating Systems
Ecosystem
ASIP Tools
< Silicon IP Products
< Silicon IP Products
< Silicon IP Products
< Silicon IP Products
< Silicon IP Products
< overview
Silicon IP Products
+
Interface IP
+
Memories & Libraries
+
Analog IP
+
Processor Solutions
+
IP Subsystems
+
Security IP
+
Market Segments
+
IP Accelerated
+
SoC Infrastructure IP
< Solutions
< Resources
< Services
< Services
< Services
< Community
Community
Community Overview
< Community
< Community
< Community
< Community
< Community
< Community
< Community
< overview
Community
+
Community
+
SNUG
+
Partners
+
EmbARC.org
+
Interoperability
+
Academic Programs
+
Company Blogs
+
BSIMM
< overview
Software Integrity
< Tools & Services
< Tools & Services
Professional Services
Strategy and Planning (BSIMM)
Architecture & Design
DevSecOps Integration
Cloud Security
Industry Solutions
< Tools & Services
Open Source Audits
< overview
< Training & Education
< Training & Education
Product Education
< overview
< Solutions
< Solutions
< Resources
< Resources
< Support
< Support
Contact Support
< Partners
< main menu
Software Integrity
+
Software Integrity
+
Tools & Services
+
Training & Education
+
Solutions
+
Resources
+
Support
+
Partners
< About Us
< About Us
< About Us
< About Us
< About Us
< About Us
DesignWare MIPI UniPro Controller IP
The Unified Protocol (UniPro) specification defines a layered protocol for interconnecting devices and components within mobile device systems. It is applicable to a wide range of component types including application processors, co-processors, and modems, as well as different types of data traffic including control messages, bulk data transfer and packetized streaming. Implementing the UniPro specification reduces time-to-market and design costs by simplifying the interconnection of peripherals. In addition, the re-useable, extensible nature of the specification simplifies new feature implementation.
Synopsys’ DesignWare® MIPI® UniPro Controller IP, compliant with the latest MIPI UniPro v1.8 specification, provides the capability to control the UniPro link over a MIPI M-PHY link. Due to its generic nature, the MIPI UniPro Controller IP is capable of transporting any kind of data between applications like camera, display, and memory devices on the same physical link. When the DesignWare MIPI UniPro Controller IP is combined with the DesignWare Universal Flash Storage (UFS) Host Controller IP and DesignWare® MIPI® M-PHY IP, Synopsys provides a single vendor UFS IP solution that designers can easily integrate into application processors with less risk, while speeding time-to-market of advanced SoCs and device integrated circuits (ICs).
DesignWare MIPI Complete Solution Datasheet DesignWare MIPI UniPro Controller Datasheet
Highlights
Products
Downloads and Documentation
- Compliant with the MIPI UniPro v1.8 specification
- Supports all host and device configurations for JEDEC Universal Flash Storage (UFS), and UniPort-M
- Supports HS-Gear4 DesignWare M-PHY IP v4.1 and access to attributes
- HS-Gear4 adaptation and advanced granularity capability
- Low-power operation, small area, and low latency
- Supports clock and power gating using Unified Power Format (UPF)
- Skip symbol insertion, scrambler function, MK2 extension
- Scalable maximum bandwidth (up to 4 lanes in each direction)1
- Configurable number of C Ports and DDB settings