Architecture Design Quickly explore tradeoffs in your SoC architecture to achieve optimal product performance and cost to avoid over- or under-design
FPGA-Based Prototyping Accelerate the creation of your ASIC prototype with a high-speed physical prototyping environment including a comprehensive software flow
Virtual Prototyping Accelerate pre-RTL, embedded software development, hardware/software integration and system validation
Power Electronic Systems Simulate and execute behavioral design, modeling and simulation for power electronics, multi-domain systems and wire harnesses
Helping You Solve Your Toughest IC Design Challenges
Core Optimization
Differentiate your product with the right combination of performance, power and area for your most design-critical cores
Design Flow Deployment
Optimize your design flow to address the latest design challenges
Physical Design Assistance
Leverage our tape-out proven flows and project experience to implement your very-deep submicron chip
SoC Integration & Verification
Get to market faster and reduce SoC design and verification cost by applying best practices in RTL creation and functional verification
Synopsys' DesignWare® MIPI® M-PHY IP is compliant to the latest MIPI Alliance M-PHY specification and supports a wide range of high-speed interfaces for mobile applications including JEDEC Universal Flash Storage (UFS), USB SuperSpeed InterChip (SSIC), PCI-SIG M-PCIe™, MIPI UniPro, DigRF v4, Low Latency Interface (LLI) and future CSI-3 and DSI-2.
The DesignWare MIPI M-PHY IP supports High-Speed Gear1, Gear2 and Gear3 rates A/B along with Type-I and Type-II low-speed capabilities. The M-PHY’s modular architecture allows implementation of a variety of transmitter and receiver lanes to meet a broad range of applications and all modes outlined in the protocol specification. A sophisticated clock recovery mechanism and power efficient clock circuitry are designed to guarantee the integrity of the clocks and signals required to meet strict timing requirements. The DesignWare MIPI M-PHY supports large and small amplitudes, slew rate control and dithering functionality for optimized electromagnetic interference (EMI) performance.
DesignWare MIPI Complete Solution Datasheet DesignWare MIPI M-PHY Datasheet
