- Silicon Design & Verification
- Products
- Solutions
- Resources
- Services
- Community
- Training
- Silicon IP
- Products
- Markets
- Newsletter
- Customer Success
- News
- Resources
- Company
- About Us
- Investor Relations
- Community
- Newsroom
- Resources
- Careers
< Silicon Design & Verification
Silicon Design & Verification
< Products
< Products
< Products
< Products
< Products
< Products
< Products
< Silicon Design & Verification
< Solutions
< Solutions
Cloud
Synopsys in the Cloud
< Solutions
< Solutions
Optical Design Solutions
Lighting Simulation Software
Optical Design Software
Automotive Lighting Design Software
< Solutions
< Solutions
< Silicon Design & Verification
< Resources
< Resources
Verification
Articles
Blogs
Datasheets
Events
News
Newsletters
Success Stories
Videos
Webinars
White Papers
< Resources
< Silicon Design & Verification
< Services
< Services
< Services
< Silicon Design & Verification
< Community
Community
Community Overview
< Community
< Community
< Community
< Community
< Silicon Design & Verification
< Training
< Silicon Design & Verification
Training
Training and Education
< main menu
< Silicon IP
Silicon IP
< Products
< Products
Processor Solutions
ARC Processor IP
Embedded Vision Processor IP
Development Tools
Operating Systems
Ecosystem
ASIP Tools
< Products
Memories & Libraries
Logic Libraries
Memory Compilers
Duet Packages
HPC Design Kit
Embedded Test & Repair
Non-Volatile Memory
< Products
< Products
Analog IP
Data Converters
< Products
< Products
< Products
< Silicon IP
< Markets
< Silicon IP
Newsletter
< Silicon IP
Customer Success
< Silicon IP
News
< Resources
< Resources
< main menu
< Software Integrity
Polaris Platform
Comprehensive application security from developer to deployment
< Software Integrity
< Software Integrity
< Software Integrity
Professional Services
Strategy and programs that address security before, during and after development
< Software Integrity
< Tools
< Tools
< Tools
< Tools
< Software Integrity
< Services
Managed Security Testing
Managed SAST
Dynamic Analysis (DAST)
Penetration Testing
Mobile Application Security Testing
Network Security Testing
< Services
Professional Services
Strategy and Planning
Architecture & Design
DevSecOps Integration
Cloud Security
Industry Solutions
< Services
< Software Integrity
< Training
< Training
Product Education
< Training
Community
< Software Integrity
< Solutions
< Solutions
< Resources
< Resources
< Software Integrity
< Software Integrity
Customers
< Partners
< Partners
Become a partner
< Software Integrity
< Software Integrity
Blog
< main menu
< About Us
Company
< About Us
< About Us
About Us
About Us
< Investor Relations
< About Us
Investor Relations
Investor Relations
< Community
< About Us
Community
Community
< Newsroom
< About Us
Newsroom
Newsroom
< Resources
< About Us
Resources
Resources
< Careers
< About Us
Careers
Careers
< main menu
Synopsys DesignWare MIPI C-PHY/D-PHY IP
Synopsys’ integrated DesignWare C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for mobile, automotive, artificial intelligence (AI), and IoT applications. The PHY, for FinFET processes and compliant with the MIPI C-PHY and D-PHY specifications, operates at 4.5Gb/s per lane and 3.5Gs/s per trio respectively for a maximum speed of 24Gb/s. DesignWare C-PHY/D-PHY addresses energy requirements by supporting low-power state modes and delivering below 1.3pJ/bit at the maximum speed. The PHY offers built-in test capabilities, including pattern generator, logic analyzer, and loopback modes covering all circuits. The DesignWare C-PHY/D-PHY IP interoperates with Synopsys’ ASIL B Ready ISO 26262 certified CSI-2 and DSI/DSI-2 controllers which support key features of the latest MIPI display and camera specifications.
DesignWare MIPI C-PHY/D-PHY IP Datasheet
|
| Product Update: Integrated MIPI C-PHY/D-PHY IP Get the latest update on Synopsys DesignWare MIPI C-PHY/D-PHY IP solution and how the 24 Gbps total bandwidth can enable your camera, display, automotive, drone, and image sensor SoCs implemented in advanced FinFET processes.Licinio Sousa |
Highlights
Products
Downloads and Documentation
- Compliant with the MIPI D-PHY specification, v2.1
- 4 Lanes in D-PHY mode up to 4.5 Gb/s per lane
- Compliant with the MIPI C-PHY specification, v1.2
- 3 trios in C-PHY mode up to 3.5 Gs/s per trio
- Aggregate throughput up to 24Gb/s in C-PHY mode and 18Gb/s in D-PHY mode
- Wide PHY Protocol Interface (PPI)
- Low-power escape modes and ultra low-power state modes
- Shutdown mode
- High speed BIST and at-speed scan test
- Master, slave, TX- and RX-only configurations
- Flexible input clock reference and lane/trio swap
- Silicon-proven, robust design available in advanced process technologies
| MIPI C-PHY v1.2 D-PHY v2.1 RX 3 trios/4 Lanes - TSMC12FFC 1.8V, North/South Poly Orientation | STARs | Subscribe |
| MIPI C-PHY v1.2 D-PHY v2.1 RX 3 trios/4 Lanes - TSMC7FF 1.8V, North/South Poly Orientation | STARs | Subscribe |
| MIPI C-PHY v1.2 D-PHY v2.1 TX 3 trios/4 Lanes - TSMC12FFC 1.8V, North/South Poly Orientation | STARs | Subscribe |
| MIPI C-PHY v1.0 D-PHY v1.2 RX 3 trios/4 Lanes - TSMC 12FFC 1.8V, North/South Poly Orientation | STARs | Subscribe |
| MIPI C-PHY v1.0 D-PHY v1.2 RX 3 trios/4 Lanes - TSMC 7FF 1.8V, North/South Poly Orientation | STARs | Subscribe |
| MIPI C-PHY v1.0 D-PHY v1.2 TX 3 trios/4 Lanes - TSMC 12FFC 1.8V, North/South Poly Orientation | STARs | Subscribe |
| MIPI C-PHY v1.0 D-PHY v1.2 TX 3 trios/4 Lanes - TSMC 7FF 1.8V, North/South Poly Orientation | STARs | Subscribe |
| Description: | MIPI C-PHY v1.0 D-PHY v1.2 RX 3 trios/4 Lanes - TSMC 12FFC 1.8V, North/South Poly Orientation |
| Name: | dwc_mipi_cd_rx_3t4l_tsmc12ffc18ns |
| Version: | 7.01f |
| STARs: | Open and/or Closed STARs |
| myDesignWare: | Subscribe for Notifications |
| Product Type: | DesignWare Cores |
| Documentation: |
Hide Documents... Application Notes DesignWare Cores MIPI CD-PHY v1.0/1.2 RX 3T/4L for TSMC 12-nm FFC/1.8V Integration … ( PDF ) Databook DesignWare Cores MIPI CD-PHY v1.0/1.2 RX 3T/4L for TSMC 12-nm FFC/1.8V Databook ( PDF ) Datasheet DesignWare MIPI C-PHY/D-PHY IP Datasheet ( PDF ) Release Notes DesignWare Cores MIPI CD-PHY v1.0/1.2 RX 3T/4L for TSMC 12-nm FFC/1.8V Release Notes ( TXT ) |
| Download: | MIPI-CD-RX_3T4L_TSMC_12FFC |
| Product Code: | E138-0 |
| Description: | MIPI C-PHY v1.0 D-PHY v1.2 RX 3 trios/4 Lanes - TSMC 7FF 1.8V, North/South Poly Orientation |
| Name: | dwc_mipi_cd_rx_3t4l_tsmc7ff18ns |
| STARs: | Open and/or Closed STARs |
| myDesignWare: | Subscribe for Notifications |
| Product Type: | DesignWare Cores |
| Documentation: | |
| Description: | MIPI C-PHY v1.0 D-PHY v1.2 TX 3 trios/4 Lanes - TSMC 12FFC 1.8V, North/South Poly Orientation |
| Name: | dwc_mipi_cd_tx_3t4l_tsmc12ffc18ns |
| Version: | 7.02b |
| STARs: | Open and/or Closed STARs |
| myDesignWare: | Subscribe for Notifications |
| Product Type: | DesignWare Cores |
| Documentation: |
Hide Documents... Application Notes DesignWare Cores MIPI CD-PHY v1.0/1.2 TX 3T/4L for TSMC 12-nm FFC/1.8V Integration … ( PDF ) Databook DesignWare Cores MIPI CD-PHY v1.0/1.2 TX 3T/4L for TSMC 12-nm FFC/1.8V Databook ( PDF ) Datasheet DesignWare MIPI C-PHY/D-PHY IP Datasheet ( PDF ) Release Notes DesignWare Cores MIPI CD-PHY v1.0/1.2 TX 3T/4L for TSMC 12-nm FFC/1.8V Release Notes ( TXT ) |
| Download: | MIPI-CD-TX_3T4L_TSMC_12FFC |
| Product Code: | E140-0 |
| Description: | MIPI C-PHY v1.0 D-PHY v1.2 TX 3 trios/4 Lanes - TSMC 7FF 1.8V, North/South Poly Orientation |
| Name: | dwc_mipi_cd_tx_3t4l_tsmc7ff18ns |
| STARs: | Open and/or Closed STARs |
| myDesignWare: | Subscribe for Notifications |
| Product Type: | DesignWare Cores |
| Documentation: | |
| Description: | MIPI C-PHY v1.2 D-PHY v2.1 RX 3 trios/4 Lanes - TSMC12FFC 1.8V, North/South Poly Orientation |
| Name: | dwc_mipi_cd_12_21_rx_3t4l_tsmc12ffc18ns |
| Version: | 7.01f |
| STARs: | Open and/or Closed STARs |
| myDesignWare: | Subscribe for Notifications |
| Product Type: | DesignWare Cores |
| Documentation: |
Hide Documents... Application Notes DesignWare Cores MIPI CD-PHY v1.2/v2.1 RX 3T/4L for TSMC 12-nm FFC/1.8V Integration … ( PDF ) Databook DesignWare Cores MIPI CD-PHY v1.2/v2.1 RX 3T/4L for TSMC 12-nm FFC/1.8V Databook ( PDF ) Release Notes DesignWare Cores MIPI CD-PHY v1.2/v2.1 RX 3T/4L for TSMC 12-nm FFC/1.8V Release … ( TXT ) |
| Download: | MIPI-CD-RX_3T4L-45_TSMC_12FFC |
| Description: | MIPI C-PHY v1.2 D-PHY v2.1 RX 3 trios/4 Lanes - TSMC7FF 1.8V, North/South Poly Orientation |
| Name: | dwc_mipi_cd_12_21_rx_3t4l_tsmc7ff18ns |
| STARs: | Open and/or Closed STARs |
| myDesignWare: | Subscribe for Notifications |
| Product Type: | DesignWare Cores |
| Documentation: | Contact Us for More Information |
| Description: | MIPI C-PHY v1.2 D-PHY v2.1 TX 3 trios/4 Lanes - TSMC12FFC 1.8V, North/South Poly Orientation |
| Name: | dwc_mipi_cd_12_21_tx_3t4l_tsmc12ffc18ns |
| STARs: | Open and/or Closed STARs |
| myDesignWare: | Subscribe for Notifications |
| Product Type: | DesignWare Cores |
| Documentation: | Contact Us for More Information |