DesignWare USB 3.2 PHY IP

Synopsys' DesignWare USB 3.2 PHY IP provides designers with the industry's best combination of low area and low power with support for the leading process technologies such as 7nm FinFET. The USB 3.2 PHYs use a single efficient GDSII design that SuperSpeed USB 3.2 Gen 1 at 5Gbps, USB 3.2 Gen2 at 10Gbps, and USB 3.2 Gen2 x2 at 20Gbps.

Synopsys DesignWare USB IP is the most certified USB IP solution in the industry. With experience supporting over 3,500 design wins and approximately three billion silicon-proven units shipped, Synopsys' USB 3.2 IP solution, consisting of a controller, PHYs, verification IP, and IP subsystems, enables designers to lower integration risk and speed time-to-market.

DesignWare SuperSpeed USB 3.2 IP Solution

Highlights

Products

Downloads and Documentation

DesignWare USB 3.2 PHYs and controllers offer high-performance throughput
USB-C 3.2 PHY IP supports USB Type-C specification
Supports SuperSpeed USB 3.2 Gen1 at 5Gbps, USB 3.2 Gen2 at 10Gbps, and USB 3.2 Gen2 x2 at 20Gbps
Designed for advanced 1.8V CMOS planar bulk and FinFET process nodes
Integrated PHY includes transmitter, receiver, PLL, digital core, and ESD
Supports Hi-Speed 480 Mbps and Full Speed 12 Mbps

USB-C 3.2 SS/SSP PHY, Type-C - TSMC N5, North/South Poly Orientation	STARs	Subscribe
USB-C 3.2 SS/SSP PHY, Type-C - TSMC 6FF, North/South Poly Orientation	STARs	Subscribe
USB-C 3.2 SS/SSP PHY, Type-C - TSMC 7FF, North/South Poly Orientation	STARs	Subscribe

Description:	USB-C 3.2 SS/SSP PHY, Type-C - TSMC 6FF, North/South Poly Orientation
Name:	dwc_usbc32sspphy_tsmc6ffns
Version:	4.01a
STARs:	Open and/or Closed STARs
myDesignWare:	Subscribe for Notifications
Product Type:	DesignWare Cores
Documentation:	Show Documents... Hide Documents... Application Notes DesignWare Cores USBC3.2SSP+ PHY ATE Test Bench for TSMC6FF (PHY Version: 4.01a) ( PDF ) Databooks DesignWare Cores USBC3.2SSP+ PHY for TSMC6FF (PHY Version: 4.01a) ( PDF ) Type-C USB3.2 SSP+ PCS for the DesignWare Cores USBC3.2SSP+ PHY (PHY Version: … ( PDF ) Datasheet DesignWare SuperSpeed USB 3.2 IP Solution ( PDF ) Release Notes Type-C USB3.2SSP+ PHY NS for TSMC6FF 1.8V Release Notes (PHY Version: 4.01a) ( TXT ) White Paper USB 3.2: A USB Type-C Challenge for SoC Designers ( PDF )
Download:	dwc_usbc32sspphy_tsmc6ffns

Description:	USB-C 3.2 SS/SSP PHY, Type-C - TSMC 7FF, North/South Poly Orientation
Name:	dwc_usbc32sspphy_tsmc7ffns
Version:	2.07a
STARs:	Open and/or Closed STARs
myDesignWare:	Unsubscribe
Product Type:	DesignWare Cores
Documentation:	Show Documents... Hide Documents... Databook DesignWare Cores Type-C USB 3.2 SS+ PHY for TSMC 7 FF ( PDF ) Datasheet DesignWare SuperSpeed USB 3.2 IP Solution ( PDF ) Release Notes DesignWare Cores Type-C USB 3.2 SS+ PHY for TSMC 7 FF Release Notes ( TXT ) White Paper USB 3.2: A USB Type-C Challenge for SoC Designers ( PDF )
Download:	USB3.2-SPPHY_TSMC_N7
Product Code:	D921-0

Description:	USB-C 3.2 SS/SSP PHY, Type-C - TSMC N5, North/South Poly Orientation
Name:	dwc_usbc32sspphy_tsmc5ffns
Version:	3.01a
STARs:	Open and/or Closed STARs
myDesignWare:	Unsubscribe
Product Type:	DesignWare Cores
Documentation:	Show Documents... Hide Documents... Application Notes Designware Cores Consumer 10 Type-C USB3.2SS+ PHY ATE Test Bench ( PDF ) Databooks DesignWare Cores Type-C USB3.2SS+ PHY Databook for TSMC5FFP (PHY Version: 3.01a) ( PDF ) Type-C USB3.2SSP+ PCS for the DesignWare Cores Type-C USB3.2SSP+ PHY ( PDF ) Datasheet DesignWare SuperSpeed USB 3.2 IP Solution ( PDF ) Release Notes DesignWare Cores Type-C USB3.2SS+ PHY Release Notes for TSMC5FFP (PHY Version: … ( TXT ) White Paper USB 3.2: A USB Type-C Challenge for SoC Designers ( PDF )
Download:	dwc_usbc32sspphy_tsmc5ffns
Product Code:	E507-0