Synopsys provides designers with silicon-proven, configurable USB 3.1 Controllers. The Synopsys USB 3.1 controllers provide the lowest possible gate count, efficient power management optimized with dual power rails, and PIPE and UTMI/UTMI+ interfaces for PHYs. This comprehensive solution includes support for Dual Role Device (DRD), xHCI Host, and Device.
Synopsys USB 3.1 Controller IP offers the flexibility required for high-volume, fast turnaround consumer applications. Configuration options maximize SoC design performance and minimize CPU interrupts, while flexible parameters enable easy integration into low- and high-latency systems.
Synopsys USB Controller IP has shipped in almost two billion units for leading electronics companies worldwide. Using Synopsys USB IP significantly reduces development time and engineering risk, bringing USB-based SoCs to market faster.
Synopsys USB IP is the most certified IP solution in the industry. With over 3,000 design wins, Synopsys' complete USB IP solution--consisting of controllers, PHYs, verification IP, drivers, and IP prototypes--enables designers to lower integration risk and speed time-to-market.
DesignWare SuperSpeed USB 3.1 IP Solution
Synopsys USB-C 3.1/DisplayPort 1.4 TX IP Complete Solution
Highlights
Products
Downloads and Documentation
- Supports SuperSpeed USB power savings modes, Uniform Power Format (UPF) and dual power rails
- Configurable data buffering options to optimize performance vs area
- Lowers overall system power by design
- Supports SuperSpeed and High-Speed modes
- Migrate quickly from USB 3.0 to USB 3.1 by using existing USB 3.0 drivers
| Description: |
SuperSpeed USB 3.1 Device Controller |
| Name: |
dwc_usb_3_1_device |
| Version: |
2.00a |
| ECCN: |
5E991/NLR |
| STARs: |
Open and/or Closed STARs |
| myDesignWare: |
Subscribe for Notifications |
| Product Type: |
DesignWare Cores |
| Documentation: |
Hide Documents...
Application Notes DesignWare Cores USB3.1 SSP PHY and Controller Integration Guide (App Note Version … ( PDF | HTML )
Designware Cores Enhanced SuperSpeed USB 3.1 Controller Packaged Verification … ( PDF | HTML )
Designware Cores Enhanced SuperSpeed USB 3.1 Controller Simulation Debug Guide … ( PDF | HTML )
Databooks Designware Cores Enhanced SuperSpeed USB 3.1 Controller Databook (2.00a) ( PDF | HTML )
Designware Cores Enhanced SuperSpeed USB 3.1 Controller Databook - with Change … ( PDF )
Datasheets DesignWare SuperSpeed USB 3.1 IP Solution ( PDF )
Synopsys USB-C 3.1/DisplayPort 1.4 TX IP Complete Solution ( PDF )
Installation Guide Designware Cores Enhanced SuperSpeed USB 3.1 Controller Installation Guide (2.00a) ( PDF )
Programming Guides Designware Cores Enhanced SuperSpeed USB 3.1 Controller Programming Guide (2.00a) ( PDF | HTML )
Designware Cores Enhanced SuperSpeed USB 3.1 Controller Programming Guide - with … ( PDF )
Release Notes Designware Cores Enhanced SuperSpeed USB 3.1 Controller Release Notes (2.00a) ( PDF )
Training Videos Configuring DWC_usb3 Controller as a Device - v3.00a (58.64) ( PDF )
DWC_usb3 Controller Clocks and Clock Synthesis - v3.00a (34:54) ( PDF )
Managing Power in DWC_usb3 - v2.80a (45:38) ( PDF )
User Guides Designware Cores Enhanced SuperSpeed USB 3.1 Controller User Guide (2.00a) ( PDF | HTML )
Designware Cores Enhanced SuperSpeed USB 3.1 Controller User Guide - with Change … ( PDF )
White Papers Addressing Three Critical Challenges of USB Type-C Implementation ( PDF )
USB 3.2: A USB Type-C Challenge for SoC Designers ( PDF )
USB 3.2: The Latest USB Type-C Challenge for SoC Designers ( PDF )
|
| Toolsets: |
Qualified Toolsets |
| Download: |
dw_iip_DWC_usb31 |
| Product Code: |
A868-0 |
| | |
| Description: |
SuperSpeed USB 3.1 DRD Controller |
| Name: |
dwc_usb_3_1_drd |
| Version: |
2.00a |
| ECCN: |
5E991/NLR |
| STARs: |
Open and/or Closed STARs |
| myDesignWare: |
Subscribe for Notifications |
| Product Type: |
DesignWare Cores |
| Documentation: |
Hide Documents...
Application Notes DesignWare Cores USB3.1 SSP PHY and Controller Integration Guide (App Note Version … ( PDF | HTML )
Designware Cores Enhanced SuperSpeed USB 3.1 Controller Packaged Verification … ( PDF | HTML )
Designware Cores Enhanced SuperSpeed USB 3.1 Controller Simulation Debug Guide … ( PDF | HTML )
Databooks Designware Cores Enhanced SuperSpeed USB 3.1 Controller Databook (2.00a) ( PDF | HTML )
Designware Cores Enhanced SuperSpeed USB 3.1 Controller Databook - with Change … ( PDF )
Datasheets DesignWare SuperSpeed USB 3.1 IP Solution ( PDF )
Synopsys USB-C 3.1/DisplayPort 1.4 TX IP Complete Solution ( PDF )
Installation Guide Designware Cores Enhanced SuperSpeed USB 3.1 Controller Installation Guide (2.00a) ( PDF )
Programming Guides Designware Cores Enhanced SuperSpeed USB 3.1 Controller Programming Guide (2.00a) ( PDF | HTML )
Designware Cores Enhanced SuperSpeed USB 3.1 Controller Programming Guide - with … ( PDF )
Release Notes Designware Cores Enhanced SuperSpeed USB 3.1 Controller Release Notes (2.00a) ( PDF )
Training Videos Configuring DWC_usb3 Controller as a Device - v3.00a (58.64) ( PDF )
Configuring DWC_usb3 Controller as a Host - v2.80a (44:24) ( PDF )
DWC_usb3 Controller Clocks and Clock Synthesis - v3.00a (34:54) ( PDF )
Managing Power in DWC_usb3 - v2.80a (45:38) ( PDF )
User Guides Designware Cores Enhanced SuperSpeed USB 3.1 Controller User Guide (2.00a) ( PDF | HTML )
Designware Cores Enhanced SuperSpeed USB 3.1 Controller User Guide - with Change … ( PDF )
White Papers Addressing Three Critical Challenges of USB Type-C Implementation ( PDF )
USB 3.2: A USB Type-C Challenge for SoC Designers ( PDF )
USB 3.2: The Latest USB Type-C Challenge for SoC Designers ( PDF )
|
| Toolsets: |
Qualified Toolsets |
| Download: |
dw_iip_DWC_usb31 |
| Product Code: |
A871-0 |
| | |
| Description: |
SuperSpeed USB 3.1 Host Controller |
| Name: |
dwc_usb_3_1_host |
| Version: |
2.00a |
| ECCN: |
5E991/NLR |
| STARs: |
Open and/or Closed STARs |
| myDesignWare: |
Subscribe for Notifications |
| Product Type: |
DesignWare Cores |
| Documentation: |
Hide Documents...
Application Notes DesignWare Cores USB3.1 SSP PHY and Controller Integration Guide (App Note Version … ( PDF | HTML )
Designware Cores Enhanced SuperSpeed USB 3.1 Controller Packaged Verification … ( PDF | HTML )
Designware Cores Enhanced SuperSpeed USB 3.1 Controller Simulation Debug Guide … ( PDF | HTML )
Databooks Designware Cores Enhanced SuperSpeed USB 3.1 Controller Databook (2.00a) ( PDF | HTML )
Designware Cores Enhanced SuperSpeed USB 3.1 Controller Databook - with Change … ( PDF )
Datasheet DesignWare SuperSpeed USB 3.1 IP Solution ( PDF )
Installation Guide Designware Cores Enhanced SuperSpeed USB 3.1 Controller Installation Guide (2.00a) ( PDF )
Programming Guides Designware Cores Enhanced SuperSpeed USB 3.1 Controller Programming Guide (2.00a) ( PDF | HTML )
Designware Cores Enhanced SuperSpeed USB 3.1 Controller Programming Guide - with … ( PDF )
Release Notes Designware Cores Enhanced SuperSpeed USB 3.1 Controller Release Notes (2.00a) ( PDF )
Training Videos Configuring DWC_usb3 Controller as a Host - v2.80a (44:24) ( PDF )
DWC_usb3 Controller Clocks and Clock Synthesis - v3.00a (34:54) ( PDF )
Managing Power in DWC_usb3 - v2.80a (45:38) ( PDF )
User Guides Designware Cores Enhanced SuperSpeed USB 3.1 Controller User Guide (2.00a) ( PDF | HTML )
Designware Cores Enhanced SuperSpeed USB 3.1 Controller User Guide - with Change … ( PDF )
White Papers USB 3.2: A USB Type-C Challenge for SoC Designers ( PDF )
USB 3.2: The Latest USB Type-C Challenge for SoC Designers ( PDF )
|
| Toolsets: |
Qualified Toolsets |
| Download: |
dw_iip_DWC_usb31 |
| Product Code: |
A869-0, A870-0, A872-0 |
| | |
| Description: |
SuperSpeed USB 3.1 Host Controller Multiport |
| Name: |
dwc_usb_3_1_host_multiport |
| Version: |
2.00a |
| ECCN: |
5E991/NLR |
| STARs: |
Open and/or Closed STARs |
| myDesignWare: |
Subscribe for Notifications |
| Product Type: |
DesignWare Cores |
| Documentation: |
Contact Us for More Information |
| Toolsets: |
Qualified Toolsets |
| Download: |
dw_iip_DWC_usb31 |
| Product Code: |
A869-0, A870-0, A872-0 |
