Synopsys Hi-Speed USB 2.0 EHCI Host Controller

The Synopsys USB 2.0 Host Controller enables ASIC/FPGA designers to implement a complete USB 2.0 EHCI-compatible Host. The Host supports High-speed, Full-speed and Low-speed USB. The EHCI register set enables compatibility with most open-source and commercially available operating systems. The USB 2.0 Host controller is optimized for area- and power-sensitive markets such as Internet of Things (IoT).

The Synopsys USB 2.0 Host Controller can be easily integrated into an SoC using the AMBA™ AHB interface. These device designs significantly reduce development time and engineering risk, bringing low-power, small-area USB-based designs to market faster.

Synopsys USB 2.0 Controller IP


  • High-speed (480 Mbps), Full-speed (12 Mbps), and Low-speed (1.5 Mbps) capability
  • Configurable root hub supporting multiple downstream ports with 1.1 or 2.0 speed capability
  • Choice of micro-frame or frame caching of data structures (EHCI)
  • AHB interface available
  • Starts at 80K gates
  • Supports UTMI+ and ULPI interfaces for rapid PHY integration
  • Verilog source code
  • Test environment for integration testing