Silicon Performance Variation Visibility from Design to In-Field
Structural monitors are a significant step in the evolution of embedded monitoring. By distributing structural monitors throughout your advanced node design, data associated with the operational margin of your silicon can be gathered and assessed. The ability to enable enhanced performance optimization and to enable better assessment of silicon aging and degradation are the two key benefits to the inclusion of structural monitors. Data from structural monitors can be assessed at any stage of the silicon lifecycle and will form the basis to highly enriched analytics for not only production test but also in-field operation. Smart voltage frequency scaling (VFS), power supply margin, and timing margin optimization are some of the concepts which can be enabled by structural monitors. Structural monitors from Synopsys include path margin monitoring technologies.
Measure Timing Margin of Actual Functional Paths In-Test or In-Field
The Path Margin Monitor (PMM) solution consists of multiple PMM units, a PMM controller, and associated software and EDA automation. PMM IP is a building block for the PMM solution which is also supported by an automated implementation flow from Synopsys. Path selection logic, RTL configuration and generation, connecting to functional and/or test paths, synthesis, implementation, timing validation and path qualification are the key functions addressed by the EDA automation provided. Associated software allows the data generated from the PMM solution to be effectively analyzed and allow precise decisions made based on those insights.
Path Margin Monitor Unit
The PMM unit enables timing margin measurement of selected path in-test or mission mode. Timing margin is a key indicator of silicon structural health. Each PMM can handle multiple end points for measurement and each PMM controller can support multiple PMMs. On a single chip you can place numerous PMMs without much area overhead, providing very valuable data which can be analyzed for insights to optimize any phase of silicon lifecycle. EDA and software automation along with path selection logic plays a crucial role in making PMMs practical.
Path Margin Monitor Controller
Synopsys Silicon Lifecycle Management (SLM) Path Margin Monitors