DesignWare IP Prototyping Kits for USB 3.1, 3.0 & 2.0
The DesignWare® IP Prototyping Kits for USB 3.1, 3.0 and 2.0 Host and Device center around complete, out-of-the-box reference designs that consist of a validated IP configuration and necessary SoC integration logic, implemented on Synopsys’ HAPS®-DX FPGA-based prototyping system.
With a proven reference design for the IP, designers can be instantly productive, enabling them to accelerate the integration of IP into their target SoC, optimize the IP configuration, and develop drivers and software applications with real world I/Os and hardware. The prototyping kits take advantage of Synopsys’ HAPS Developer eXpress (HAPS-DX) system to provide prototyping hardware and software automation tools. Scripts and configuration files enable fast iteration.
The IP Prototyping Kits can be used as a physical target for early software bring-up, debug and test concurrently with SoC development. Out-of-the-box support for Linux software stack or Windows ensures that software developers are up and running instantly and can focus on the IP specific software (e.g., drivers, bootcode, firmware). The kits plugs into existing software tool chains and interfaces seamlessly with popular embedded software debuggers, providing system-wide debug and analysis capabilities.
DesignWare Hybrid IP Prototyping Kits DesignWare IP Prototyping Kit for USB 3.0 Device with ARC Software Development Platform DesignWare IP Prototyping Kit for USB 3.0 Device with PCIe Connection to PC DesignWare IP Prototyping Kit for USB 3.0 DRD in USB 2.0 Only Mode DesignWare IP Prototyping Kit for USB 3.0 Host Controller with ARC Software Development Platform DesignWare IP Prototyping Kit for USB 3.0 Host Controller with PCIe Connection to PC DesignWare IP Prototyping Kit for USB 3.1 Host Controller with PCIe Connection to PC
Highlights
Products
Downloads and Documentation
- DesignWare USB 3.1, 3.0 or 2.0 Controller, supporting SuperSpeedPlus (SSP), SuperSpeed (SS), High-Speed (HS), Full-Speed (FS) and/or Low-Speed (LS)
- Pre-instrumented deep-trace debug for most relevant interfaces
- Clock gating for power optimization
- IP Prototyping Kits for USB 3.1 Host or Device Controller:
- 32-bit/312.5 MHz clock PIPE PHY interface for SSP
- 125 MHz bus clock and RAM clock frequency for SSP, SS and HS bus instance bandwidth requirements
- Includes a PCI Express connection to a PC
- IP Prototyping Kits for USB 3.0 Host or Device Controller:
- 32-bit/125 MHz clock PIPE PHY interface for SS and 8-bit/60 MHz clock UTMI+ interface for HS
- 80 MHz bus clock and RAM clock frequency for SS and HS bus instance bandwidth requirements
- IP Prototyping Kits for USB 3.0 Host or Device Controllers include either a DesignWare ARC® processor-based 32-bit software development platform running Linux or a PCI Express connection to a PC
- Hybrid IP Prototyping Kits for USB 3.0 Host or Device Controllers include a Virtualizer Development Kit for the ARMv8 big.LITTLE Base Platform running Linaro Linux
- IP Prototyping Kit for USB 3.0 DRD Controller in USB 2.0 only mode with USB 2.0 OTG add-on
- Configurable as Host or Device
- 8-bit/60MHz or 16-bit/30MHz clock UTMI+ interface
| IP Prototyping Kit for DWC USB 2.0 Hi-Speed OTG Controller on HAPS-DX7, USB2.0 PHY card, PCIe Connection for PC | STARs | Subscribe |
| IP Prototyping Kit for DWC USB 3.0 Device Controller on HAPS-DX7, SuperSpeed PHY card, AXI tunnel to ARC SDP | STARs | Subscribe |
| IP Prototyping Kit for DWC USB 3.0 Device Controller on HAPS-DX7, SuperSpeed PHY card, PCIe connection for PC | STARs | Subscribe |
| IP Prototyping Kit for DWC USB 3.0 Host Controller on HAPS-DX7, SuperSpeed PHY card, AXI tunnel to ARC SDP | STARs | Subscribe |
| IP Prototyping Kit for DWC USB 3.0 Host Controller on HAPS-DX7, SuperSpeed PHY card, AXI-Thin Links to ARM Juno | STARs | Subscribe |
| IP Prototyping Kit for DWC USB 3.0 Host Controller on HAPS-DX7, SuperSpeed PHY, PCIe connection for PC | STARs | Subscribe |
| IP Prototyping Kit for DWC USB 3.0 Controller in OTG v2.0 mode for HAPS-DX7, USB2.0 PHY card, PCIe Connection for PC | STARs | Subscribe |
| IP Prototyping Kit for DWC USB 3.1 Device Controller on HAPS-DX7, USB-C 3.1 PHY, PCIe connection for PC | STARs | Subscribe |
| IP Prototyping Kit for DWC USB 3.1 Host Controller on HAPS-DX7, USB-C 3.1 PHY, PCIe connection for PC | STARs | Subscribe |
| Description: | IP Prototyping Kit for DWC USB 2.0 Hi-Speed OTG Controller on HAPS-DX7, USB2.0 PHY card, PCIe Connection for PC |
| Name: | dwipk_dx_usb20hsotg_usb2phy_pcie |
| Version: | 4.00a |
| STARs: | Open and/or Closed STARs |
| myDesignWare: | Subscribe for Notifications |
| Product Type: | DesignWare Cores |
| Documentation: | |
| Download: | ipk_USB2-PHY-OTG_PCIe |
| Product Code: | HW0368-0 |
| Description: | IP Prototyping Kit for DWC USB 3.0 Controller in OTG v2.0 mode for HAPS-DX7, USB2.0 PHY card, PCIe Connection for PC |
| Name: | dwipk_dx_usb30otgv20_usb2phy_pcie |
| Version: | 1.01a |
| STARs: | Open and/or Closed STARs |
| myDesignWare: | Subscribe for Notifications |
| Product Type: | DesignWare Cores |
| Documentation: | |
| Download: | ipk_USB3-OTGv2-USB-PHY_PCIe |
| Product Code: | HW0344-0 |
| Description: | IP Prototyping Kit for DWC USB 3.0 Device Controller on HAPS-DX7, SuperSpeed PHY card, AXI tunnel to ARC SDP |
| Name: | dwipk_dx_usb30device_ssphy_arc |
| Version: | 2.11a |
| STARs: | Open and/or Closed STARs |
| myDesignWare: | Subscribe for Notifications |
| Product Type: | DesignWare Cores |
| Documentation: | |
| Download: | ipk_USB3-Device-SSPHY_ARC |
| Product Code: | HW0266-0 |
| Description: | IP Prototyping Kit for DWC USB 3.0 Device Controller on HAPS-DX7, SuperSpeed PHY card, PCIe connection for PC |
| Name: | dwipk_dx_usb30device_ssphy_pcie |
| Version: | 1.21b |
| STARs: | Open and/or Closed STARs |
| myDesignWare: | Subscribe for Notifications |
| Product Type: | DesignWare Cores |
| Documentation: | |
| Download: | ipk_USB3-Device-SSPHY_PCIe |
| Product Code: | HW0294-0 |
| Description: | IP Prototyping Kit for DWC USB 3.0 Host Controller on HAPS-DX7, SuperSpeed PHY card, AXI tunnel to ARC SDP |
| Name: | dwipk_dx_usb30host_ssphy_arc |
| Version: | 2.11a |
| STARs: | Open and/or Closed STARs |
| myDesignWare: | Subscribe for Notifications |
| Product Type: | DesignWare Cores |
| Documentation: | |
| Download: | ipk_USB3-Host-SSPHY_ARC |
| Product Code: | HW0265-0 |
| Description: | IP Prototyping Kit for DWC USB 3.0 Host Controller on HAPS-DX7, SuperSpeed PHY card, AXI-Thin Links to ARM Juno |
| Name: | dwipk_dx_usb30host_ssphy_arm |
| Version: | 1.00a |
| STARs: | Open and/or Closed STARs |
| myDesignWare: | Subscribe for Notifications |
| Product Type: | DesignWare Cores |
| Documentation: | Contact Us for More Information |
| Download: | ipk_USB3-Host-SSPHY_ARM |
| Product Code: | HW0385-0 |
| Description: | IP Prototyping Kit for DWC USB 3.0 Host Controller on HAPS-DX7, SuperSpeed PHY, PCIe connection for PC |
| Name: | dwipk_dx_usb30host_ssphy_pcie |
| Version: | 1.21a |
| STARs: | Open and/or Closed STARs |
| myDesignWare: | Subscribe for Notifications |
| Product Type: | DesignWare Cores |
| Documentation: | |
| Download: | ipk_USB3-Host-SSPHY_PCIe |
| Product Code: | HW0293-0 |
| Description: | IP Prototyping Kit for DWC USB 3.1 Device Controller on HAPS-DX7, USB-C 3.1 PHY, PCIe connection for PC |
| Name: | dwipk_dx_usb31device_c10gphy_pcie |
| Version: | 1.10a |
| STARs: | Open and/or Closed STARs |
| myDesignWare: | Subscribe for Notifications |
| Product Type: | DesignWare Cores |
| Documentation: | |
| Download: | ipk_USB3.1-Device-10G-PHY_PCIe |
| Product Code: | HW0367-0 |
| Description: | IP Prototyping Kit for DWC USB 3.1 Host Controller on HAPS-DX7, USB-C 3.1 PHY, PCIe connection for PC |
| Name: | dwipk_dx_usb31host_c10gphy_pcie |
| Version: | 1.10a |
| STARs: | Open and/or Closed STARs |
| myDesignWare: | Subscribe for Notifications |
| Product Type: | DesignWare Cores |
| Documentation: | |
| Download: | ipk_USB3.1-Host-10G-PHY_PCIe |
| Product Code: | HW0366-0 |
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