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DesignWare IP Prototyping Kits for USB 3.1, 3.0 & 2.0
The DesignWare® IP Prototyping Kits for USB 3.1, 3.0 and 2.0 Host and Device center around complete, out-of-the-box reference designs that consist of a validated IP configuration and necessary SoC integration logic. The software and application examples are implemented on Synopsys’ HAPS®-DX FPGA-based prototyping systems, or they can be delivered separately as files for implementation on your in-house HAPS-DX or HAPS-80 systems.
DesignWare IP Prototyping Kit for USB 2.0 HS OTG DesignWare IP Prototyping Kits for USB 3.0 Host and Device DesignWare IP Prototyping Kits for USB 3.1 Host and Device
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Highlights
Products
Downloads and Documentation
- Supports DesignWare USB 3.1, 3.0 or 2.0 Controller, supporting SuperSpeedPlus (SSP), SuperSpeed (SS), High-Speed (HS), Full-Speed (FS) and/or Low-Speed (LS)
- Pre-instrumented deep-trace debug for most relevant interfaces
- Clock gating for power optimization
- IP Prototyping Kits for USB are available in the following configurations:
- HAPS-DX FPGA-based prototyping systems with PC connection via PCI Express
- USB 3.1 Host
- USB 3.1 Device
- USB 3.0 Host
- USB 3.0 Device
- USB 2.0 HS OTG
- DisplayPort 1.3 Tx
- Soft IP Prototyping Kits for use with your in-house HAPS-DX or HAPS-80 systems
- USB 3.1 Host (HAPS-DX or HAPS-80)
- USB 3.1 Device (HAPS-80)
- USB 3.0 Host (HAPS-80)
- USB 3.0 Device (HAPS-80)
- DisplayPort 1.3 Tx (HAPS-DX)
| Description: | Soft Deliverable, IP Prototyping Kit for DWC USB 3.0 Dev Controller on HAPS-80, USB 3.0 PHY card, PCIe connection for PC |
| Name: | dwcipk_80_usb30device_ssphy_pcie |
| Version: | 3.20a |
| STARs: | Open and/or Closed STARs |
| myDesignWare: | Subscribe for Notifications |
| Product Type: | DesignWare Cores |
| Documentation: | |
| Download: | ipk_80_USB3-DEV-SSPHY |
| Product Code: | C367-0 |