The Synopsys Synchronous Serial Interface IP addresses the demand for high transfer rates and low latency in serial flash memories for mobile, consumer, IoT, and automotive applications. SPI is a standard for serial NOR, NAND flash and PSRAMs as well as sensors and general-purpose connectivity. The IP supports the following standards: 

  • Motorola SPI Standard/Dual/Quad/Octal /Dual Octal
  • JEDEC xSPI (JESD251B) v1.0
  • Micron XccelaBus
  • Infineon Technologies HYPERBUS™ memory (Revision E)
  • Texas instruments Synchronous serial protocol (SSP)
  • National Semiconductor Microwire 

Support for such standards allows the single IP instance to interact with multiple connected devices, supporting different protocols. Advanced features such as Execute in Place (XIP), Target Bridge mode, SPI Target Decoding, and Internal DMA allows easy access to the serial device and improves overall design performance. The standards-based Arm® AMBA® Advanced High-Performance Bus (AHB) or Advanced Peripheral Bus (APB) connects the IP to the rest of the SoC while the bus is connected to the register interface and the Direct Memory Access (DMA) interface, offering easy IP integration.

Highlights & Key Features

  •   Supports the following standards:
    • Motorola SPI
    • Standard/Dual/Quad/Octal/Dual Octal SPI
    • JEDEC xSPI (JESD251B) v1.0
    • Micron XccelaBus
    • Infineon Technologies
    • HYPERBUS™ memory
    • APMemory IoT RAMs
    • Texas instruments Synchronous serial protocol (SSP)
    • National Semiconductor Microwire
  •   Serial clock rates of 133MHz in SDR and 200 MHz in DDR for SPI transfers
  •   Advanced receive data sampling employing data strobe, programmable input delay, or clock loopback
  •   Execute in Place (XIP) mode for SPI read and write transfers
  •   Supports boot mode
  •   Supports target decoding
  •   External DMA controller interface enables the DWC_SSI to interface to a DMA controller using handshaking interface for transfer requests
  •   Internal DMA controller enables DWC_ssi to interface with internal AXI Subordinates and SPI serial interface without any software intervention
  •   SPI Bridge configuration converts all the incoming SPI transactions into corresponding AHB transactions
  •   Automotive compliant ASIL-B Controller
  •   Interoperated with multiple Flash and PSRAM devices
  • Product Details

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