DesignWare IP Solutions for AMBA - AXI DMA Controller

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The DesignWare AXI DMA controller is a highly optimized centralized AXI DMA IP component offering configuration of up to 8 channels for a range of applications.

A flexible, Multi-Interface, Centralized AXI DMA Controller (DW_axi_dmac)
  • Independent core, slave interface and master interface clocks
  • Shutting down the slave interface clock
  • • Individually shutting down the master interface clocks when no peripheral is active
  • Configurable for up to 8 channels, one per source and destination pair
  • Data transfers in one direction only (each channel is unidirectional)
  • Support for up to 2 AXI master interfaces
    • Two master interfaces for multilayer support
    • Multiple AXI masters increase bus performance by allowing direct connection of peripherals on different AXI interconnects
    • Support for different ACLK on different AMBA layers
  • Memory-to-memory, memory-to-peripheral, peripheral-to-memory, and peripheral-to-peripheral DMA transfers
  • AMBA 3 AXI/AMBA 4 AXI-compliant master interface
  • AHB/AXI4-Lite/APB3 slave interface for programming the DMA controller
  • Configurable AXI master data bus width up to 512 bits
  • Endian mode can be selected statically or dynamically for AXI master interfaces
  • Independent control for endian scheme of linked list access on master interfaces
  • Optional identification register
  • Channel locking functionality Supports locking of the internal channel arbitration for the master bus interface at different transfer hierarchy
  • DMAC status indication outputs idle/busy indication

VC Verification IP for ARM AMBA 4 AXI
Synopsys VC VIP for AMBA is based on its 100% native SystemVerilog UVM VIP architecture to enable best ease-of use, performance, and configurability, it includes verification plans, built-in coverage and supports Verdi Protocol Analyzer a protocol-aware debug environment with advanced features for debug and analysis.

Synopsys VC Verification IP (VIP) for ARM® AMBA® AXI™ provides complete protocol support for AXI3™, AXI4™, AXI4-Lite™, AXI4-Stream™, ACE™, ACE-Lite™ , AHB™ and APB™ interfaces. With a comprehensive set of protocol, methodology, verification and productivity features, users are able to achieve rapid verification convergence on their AMBA-based designs.

  • Complete protocol support for AXI3, AXI4, AXI4-Lite, AXI4-Stream, ACE, ACE-Lite, AHB and APB
  • Configurable interconnect model for AXI, ACE and AHB
  • Port level protocol checks for all interfaces
  • System-level checks for protocol, data integrity and cache coherence
  • Backdoor access to ACE master cache
  • Debug port for transaction tracking on waveforms
  • Ability to control delays for valid and ready signals with respect to reference events
  • Ability to control signal values during idle periods


AMBA 3 AXI DMA ControllerSTARsSubscribe

  Description AMBA 3 AXI DMA Controller
  Name DW_axi_dmac
  Version 1.01a
  STARs Open and/or Closed STARs
  myDesignWare Subscribe for Notifications
  Product Type DesignWare Library IP
  Toolsets Qualified Toolsets
  Download dw_iip_axi
  Product Code A415-0