ARC Processor Summit Proceedings
Easing Trace Debug in SoCs with Multiple Processor Architectures
ARC Real-Time Trace (RTT) is an efficient way to capture the behavior of a program: not only instruction trace, but register and memory changes as well. Trace data can be captured at high rate and uploaded to the debugger at Gigabit Ethernet speeds.
The ARC trace portfolio eases the hardware integration burden in SoCs with heterogeneous processor architectures by reducing trace logic and pin overhead in designs that include a mix of ARM and ARC processors, while also streamlining the debug experience for the firmware teams. This presentation explains the ARC trace architecture together with CoreSight support using the Lauterbach Trace32 debug platform.
Fergus Casey, R&D Director, Synopsys
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