Virtual Prototyping
Accelerate pre-RTL embedded software development, hardware/software integration, and system validation
Architecture Design
Quickly explore tradeoffs in your SoC architecture to achieve optimal product performance and cost to avoid over- or under-design
FPGA-Based Prototyping
Accelerate the creation of your ASIC prototype with a high-speed hardware prototyping environment including a comprehensive software flow
Core Optimization
Differentiate your product with the right combination of performance, power and area for your most design-critical cores
Design Flow Deployment
Optimize your design flow to address the latest design challenges
Physical Design Assistance
Leverage our tape-out proven flows and project experience to implement your very-deep submicron chip
IP Integration & SoC Verification
Get to market faster and reduce SoC design and verification cost by applying best practices in RTL creation and functional verification
The DesignWare DigRF 3G IP solution is based on the MIPI Alliance DigRF V3.09 specification and consists of DigRF Master and DigRF Slave controllers and a dual mode PHY.
The DigRF 3G (v3.09) is a chip-to-chip communication protocol between the Digital Baseband processor and the Analog Baseband/RF IC, for 3GPP 3G/2.5G (UMTS/EGPRS) Mobile Terminals. The interface reduces the pin count required for baseband processor interfacing RFICs, reduces power consumption and increases interoperability. The DesignWare DigRF 3G IP solution is fully silicon-proven and is designed in multiple end user ICs.DesignWare 3G DigRF PHY Datasheet DesignWare DigRF 3G Master Controller Datasheet DesignWare DigRF 3G Slave Controller Datasheet DesignWare DigRF v4 Master Controller Datasheet
Silicon-proven Master and Slave Controller IP compliant with DigRF 3G (v3.09) Specification
Master controller handles frame construction and serialization in the transmit channel and header decoding and payload processing in the receive channel
Basic handset and local diversity with multiplexed interface
AMBA®-APBTM slave interface for configuration, control and transmission of link commands
