Meeting the USB IP Requirements of SoC Designs from 180-nm to 14/16-nm FinFET

Meeting the USB IP Requirements of SoC Designs from 180-nm to 14/16-nm FinFET

The ubiquitous USB standard provides data and charging capabilities to a multitude of consumer and enterprise products. USB’s ease-of-use and wide availability is belied by USB IP designers’ technical innovations. Without these innovations, USB could not be enabled in a broad range of process technologies ranging from 180-nm to the latest 14/16-nm FinFET technologies.

This white paper addresses the five critical challenges facing designers of USB IP who need to keep pace with the process technology changes as well as the USB standard evolution:

  1. Area reduction
  2. Power reduction
  3. Production yield
  4. Reliability
  5. Evolution of features
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