Synopsys Formality White Papers

By Design Phase


System-Level Design Signal processing algorithm design, high-level synthesis, virtual platforms, mechatronics and wiring harness		Manufacturing Mask synthesis and data prep, lithography simulation and verification and yield management

Verification High-performance system, RTL, equivalence checking, and mixed-signal verification solutions		TCAD Process and device simulation solutions for technology development and manufacturing

Implementation & Sign-Off Advanced digital and custom IC and FPGA design solutions, including synthesis, physical implementation, test and sign-off		All Tools Directory of all Synopsys tools

Reduce Risk with High Quality IP


Interface and Standards IP Broad portfolio of interface IP such as USB, PCIe, DDR, SATA, HDMI, MIPI and more		Verification IP Portfolio of standard bus interfaces such as USB, PCIe, SATA and more

Analog IP Portfolio of analog IP such as Data Converters, Audio Codecs, Video Analog Front Ends and more		minPower Components Low power datapath architectures and instantiable IP extends battery life in mobile applications and reduces power consumption for SoCs

DesignWare Library Library of design and verification IP: Datapath, AMBA, Star IP and more		Vertical Markets Data Center, Digital Home, Digital Office, Mobile Multimedia, Storage, Wireless

Helping You Address Your Toughest Design Challenges


Tool & Methodology Deployment Take full advantage of the latest tool features and methodologies		Verification Accelerate adoption of advanced verification methodologies

Flow Optimization Integrate proven flows and sub-flows to address your key design challenges		System-Level Modeling Build transaction-level models (TLMs) and virtual platforms for pre-silicon software development

Implementation Experts use the latest Synopsys technology, flows and infrastructure to help you get to tapeout

Solutions for Semiconductor and System Design


Eclypse Low Power Solution The perfect alignment of technology, methodology, IP, services, and industry standards to address advanced low power design		Discovery Verification Platform An integrated portfolio of functional, AMS, formal and low-power verification tools

Galaxy Implementation Platform A comprehensive solution for cell-based and custom IC implementation		Synplicity FPGA Design Solution Comprehensive toolsets, methodologies, and services to address FPGA design requirements

Industry Solutions Tailored solutions for automotive, memory, mil/aero, mobile devices & end-product categories		Lynx Design System A highly integrated, production-ready IC development platform

Expert Training and Support Services


Training Training courses on Synopsys� tools and methodologies		Global Support Centers Open a support issue online

SolvNet Get instant online access to the self-help support resources you need		Licensing, Installation & Compute Platforms The latest information about how to install, upgrade and manage your Synopsys licenses

Explore, Interact and Collaborate


Synopsys Users Group (SNUG) Technology users and product experts exchange ideas at SNUG conferences		University Program Resources for teaching IC design: how to apply to our program, curriculum, articles, support and training, and much more

Partners Collaborating to provide advanced reference flows, design kits, libraries, IP and methodology		Interoperability EDA tools working together for customer satisfaction and success

Blogs & Forums Insights from the experts, open forums for global Synopsys community

Synopsys: Innovation and Beyond


About Synopsys Discover our company, our management team and our values		Synopsys Careers Learn about jobs, internships and our commitment to diversity

Press Room Read Synopsys news, contact the PR team, download an image, or gather other information		Events Meet with Synopsys at an industry event, participate at a SNUG® conference , or attend a Synopsys workshop or seminar

Investor Relations Browse information for shareholders, analysts and potential investors		Community Involvement Learn how Synopsys inspires the next generation of technologists

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Synopsys Formality White Papers

Hier-IQ Fact Sheet

Today�s complex SoC designs present many verification challenges for design teams. Historically, to ensure design integrity throughout the implementation process, engineers used a bottom-up, hierarchical equivalence checking methodology to reduce the size and complexity of the verification.

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