HAPS Prototyping Datasheet Download

HAPS LPDDR4 Memory Board

The HAPS LPDDR4 daughter board enables prototyping a design in context of LPDDR4 memory. The HAPS LPDDR4_HT3 daughter board contains two 32-bit, low-power, double data rate memory devices. Two memory buses are independently connected to three HapsTrak 3 connectors to support either two separate 512Mx32- bit memory interfaces or a single 512Mx64-bit memory interface. Each bus includes both data and control/address signals.

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