Join us at the ASIP University Day virtual event on Nov 12! You will hear from leading university teams about their ASIP design project results across various application domains.
Additionally, Synopsys will provide a technical update on ASIP Designer with reference examples. Click below to view the agenda and register.
Read this issue to learn about the ASIP Designer™ X-2025.06 release, featuring the introduction of the ASIP Designer Tracing Add-On, which enables you to design customized hardware tracing solutions for your custom processor. This add-on also supports trace analysis within the ChessDE debugger, leveraging its advanced profiling capabilities.
For applications requiring highly specialized processing, application-specific instruction-set processors (ASIPs) deliver greater computational efficiencies than general purpose processors and more flexibility than fixed-function RTL designs. ASIP Designer™ is the leading tool solution for creating ASIPs, which might be custom processors or programmable hardware accelerators that serve in next-generation SoCs, particularly where re-programmability provides a key competitive advantage. ASIP Designer enables designers to:
Synopsys ASIP Designer: The efficient way to design, implement, program and verify your custom processor.
Learn about the ASIP Designer methodology for various application domains, including tool demos.
Take a deep dive into the processor modeling concepts and tool flows of ASIP Designer.
Access recordings of past ASIP Designer seminars and webinars on demand.
ASIP Designer comes with an extensive library of example models that can be used as a starting point for architectural exploration and customer-specific production ASIP designs, or just can be leveraged as reference implementation for selected architectural processor features.
All these example models come in source code with a fully operational toolset, SDK, baseline verification environment and are ready for push-the-button synthesizable RTL generation.