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Synopsys DesignWare MIPI D-PHY IP Solution

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The deployment of mobile broadband networks such as 3G and 4G is driving the success and increasing popularity of Smartphones and other multimedia enabled handheld devices. Having the ability to move very large amounts of data across a wireless network is in turn pushing device manufacturers to integrate more advanced peripherals such as multi Mega Pixel cameras and larger screens. Integrating these capabilities into next generation devices brings new challenges to the industry in terms of power, time to market and overall system costs.

To address these challenges, the Mobile Industry Processor Interface (MIPI®) Alliance defines and promotes open interface specifications such as the Camera Serial Interface (CSI-2) Display Serial Interface (DSI) and UniPro which all use the MIPI D-PHY.

As a MIPI Alliance contributor and leading provider of digital and Mixed-Signal IP, Synopsys offers a high quality, silicon proven D-PHY solution available today in advanced technology nodes.

DesignWare MIPI D-PHY Datasheet
 

  • Compliant with MIPI D-Phy Interface Specification, rev. 1.0
  • Fully integrated hardmacro
  • Up to 1Gbps per lane
  • 250 Mbps in reverse direction
  • Aggregate throughput up to 2Gbps in 2 Data lanes
  • Protocol Peripheral Interface (PPI)
  • Low power Escape modes and ultra Low Power Modes
  • Shutdown mode
  • SCAN and Loopback BIST modes
  • Extensive access to internal programmability registers
MIPI DPHY Bidirectional 2 Lanes - TSMC 40LP 2.5VSTARsSubscribe

  Description MIPI DPHY Bidirectional 2 Lanes - TSMC 40LP 2.5V
  Name dwc_mipi_dphy_bd_2l_tsmc40lp25
  Version 1.0a
  STARs Open and/or Closed STARs
  myDesignWare Subscribe for Notifications
  Product Type Implementation IP
  Documentation
  Download dwc_mipi_dphy_bd_2l_tsmc40lp25
  Reference Number 21231tq