The Synopsys DesignWare® USB Hub (UH01) is a set of synthesizable building blocks that ASIC/ FPGA designers can use to implement a complete USB Hub. The UH01 device is fully compliant with the USB 1.1 specification. By utilizing Synopsys' production-proven UH01 product, designers can significantly reduce development time and engineering risk, and bring USB-based solutions to market faster. The RapidScript® utility enables designers to easily configure the device by setting the number of downstream ports. UH01 is available in Verilog, facilitating synthesis into any ASIC/FPGA technology. DesignWare USB 1.1 Hub Controller Datasheet
- 32-bit Virtual Component Interface (VCI)
- Silicon proven
- USB 1.1 compliant
- Available in Verilog
- Supports low-speed and full speed devices on downstream ports
- Integrated DPLL for clock and data recovery
- User configurable options
- to 15 downstream ports.
- Port power switching mode and over current protection.
- Number of string descriptors
- Downstream device connect/disconnect detection
- Supports suspend/ resume for power management
- Supports one interrupt endpoint in addition to endpoint 0
- Approximately 12K gates, for four ports
- Test Environment includes USB compliance tests and Bus Functional Models