DesignWare Library 

The Industry's Most Widely Used, Silicon-Proven IP 

The DesignWare Library contains the essential infrastructure IP for design and verification including datapath components, AMBA On-Chip Bus and microcontrollers (8051, 6811). With over 25,000 designers using the DesignWare Library, you can be assured that all the IP is developed with the high quality and ease of use. A single license gives designers access to all the synthesizable and verification IP in the library.


The IP is tightly integrated into the Synopsys synthesis environment and allows transparent, high-level optimization of performance during synthesis

  • AMBA
  • Comprehensive IP solutions for AMBA 3 AXI and AMBA 2.0 Protocolsmore

The DesignWare IP solutions for the AMBA® interconnect includes synthesizable IP, verification IP and an automated method for subsystem assembly.

AHB DMA Controller
The highly optimized centralized AHB DMA Controller supports up to 8 channels each with dedicated channel buffers.

AXI DMA Controller
The highly optimized centralized AXI DMA Controller is configurable for up to 8 channels for a range of applications.

APB General Peripheral
The highly configurable APB general peripherals provide designers with the flexibility to tailor the components to the desired design requirements.

APB Advanced Peripheral
The highly configurable APB Advanced Peripheral provide designers with the flexibility to tailor the components to their desired design requirements

Verification IP
Synopsys provides designers with the broadest portfolio of verification IP supporting the most popular bus protocols.

The DesignWare 8051 core provides up to three times performance improvement over the standard 8051 when operating at the same clock rate.

The DesignWare 6811 core implements the full M68HC11 instruction set and provides a rich set of configurable, optional peripherals

  • Improves quality of results (QoR) for Datapath intensive designs
  • Most comprehensive portfolio of synthesizable & verification IP
  • Reduces risk with the most widely used, silicon proven IP
  • Accelerates time to market
  • Reduces development cost and improves design reliability
  • Optimized for Synopsys Galaxy Design Platform and Discovery Verification Platform

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