The LTE / LTE-A Physical Layer Simulation Library is a set of ready-to-use simulation systems providing an executable specification of the 3GPP standard. Verified against Rohde & Schwarz signal generators, it provides an unmatched increase in productivity for wireless physical layer system design.
Use cases include network operators investigating the system performance both for scenarios specified in the standard as well as in corner cases relevant to optimizing network performance and cost. For basestation design teams as well as handset modem design teams, the LTE / LTE-A library provides a reference model for validation of their specifications. The source code provides very valuable insight into the standards definition, which may otherwise require months of reviewing written standards documents. The source code can also be used as a starting point for today's mostly processor-based implementations of wireless systems.
The reference models support both FDD and TDD modes and provide both ideal receivers (with perfect knowledge of the channel) and non-ideal receivers (which must estimate the channel characteristics). The ideal receiver provides the best achievable performance for comparison against real, non-ideal receiver implementations.
The LTE / LTE-A Physical Layer Simulation Library is organized into specific regression testbenches which mirror the tests specified in the standards reference documents. The user can immediately run these regressions and easily modify system parameters of interest in order to study performance impact in any scenario. By replacing or modifying blocks or subsystems, the user can quickly adapt the reference model to the specific implementation for their end product. The ability to efficiently deploy compute farms directly from the development environment provides wireless designers using the LTE / LTE-A library with unmatched exploration opportunities resulting in improved product performance within their time-to-market window.
The LTE / LTE-A Physical Layer Simulation Library can be used for block-level verification of hardware and software components. HDL co-simulation as well as target code simulation--either on the host or using an Instruction Set Simulator (ISS) for the target processor--enables the use of the library as a verification environment.
The LTE / LTE-A Physical Layer Simulation Library is validated against Rohde & Schwarz signal generators and available references from the standard test equipment as well as with leading customers.
The LTE / LTE-A Physical Layer Simulation Library is available for SPW and System Studio.