VC Verification IP for M-PCIe

Synopsys VC Verification IP (VIP) for PCI Express (PCIe) provides a comprehensive set of protocol, methodology, verification and productivity features, enabling users to achieve rapid verification of PCI Express Gen1, Gen2, Gen3, Gen 4, Gen 5, CCIX and M-PCIe (M-PHY) designs.

M-PCIe VC Verification IP

Protocol Features

PCIe Test Suites Available

Application Layer

  • Applications provides built-in scoreboarding via a shadow memory
  • Driver application supports all transaction types
  • Driver handles randomization, queuing, completions, and TLP checking
  • Target application randomizes read completions and ordering
  • Requestor application for automated testing of root and endpoint memory transactions

Information on Transaction Layer, Data Link Layer, PHY Layer can all be found in the datasheet.