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Intro

0:00

Emergence of Exascale Debug Complexity

1:16

Exascale Debug Requires Higher Levels of Abstraction

2:55

Real World Example for Exascale Debug Challenge

4:15

Why Waveform-level Debug is No Longer Enough A paralel drawn from graph theory

6:00

Why High Throughput Emulation Can Cause Non-Determinism

8:38

Why BGate SoCs Dramatically Slow Waveform-level Debug

11:40

Three Requirements for Exascale Debug

14:19

System-level Abstraction Debug with ZeBu High level analysis of entire design over entire bilion cycle run

18:01

Deterministic Error Reproduction in ZeBu

21:13

10X Faster Expansion and Load with Zebu and Verdi Next generation tools for waveform-level debug

24:37

ZeBu Exascale Debug Fastest way to root cause bugs in complex BG SoCs with BCycle Workloads ZeBu Exascale Debug

28:02

AMD

30:13

Networking Company

32:02

IP Company

34:10

ZeBu Exascale Debug Summary

36:00
Addressing Exascale Emulation Debug Complexity – The Case for a System-Level Approach | Synopsys
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2021Jul 20
In this on-demand webinar, we show how to use ZeBu to reduce debug time. Unlimited streaming of the design’s system log, information is captured during the emulation run and using ZeBu replay technology and Verdi debug, the bug is root caused quickly. Learn more: https://www.synopsys.com/emulation Learn more about Synopsys: https://www.synopsys.com/ Subscribe:    / synopsys   Follow Synopsys on Twitter:   / synopsys   Like Synopsys on Facebook:   / synopsys   Follow Synopsys on LinkedIn:   / synopsys  

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Synopsys

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