Synopsys Webinar

Avoiding SoC Security Threats – What Verification Engineers Should Know

Thursday, September 30, 2021 | 11:00 -11:30 a.m. PDT

The development of secure systems is of paramount importance in this age of software intensive electronic systems. Security weaknesses in the SoC hardware can lead to vulnerabilities that may be exploited later on by malicious software. These challenging problems must be addressed pre-silicon and require rigorous methodology combined with technology to provide increased security assurance.

 

Security assurance requires a full product life cycle approach. In this joint webcast, Synopsys and Tortuga will present a solution for security verification to enable the adoption of a Hardware Security Development Lifecycle (HSDL) to achieve pre-silicon security signoff. 

 

You will learn how the Tortuga methodology and products for HSDL together with the Synopsys Verification Continuum® platform enable the analysis of security threats for long software scenarios with fast turn-around-time.

 

Target audience: Engineers working with Synopsys VCS® simulation and ZeBu® emulation system who want to extend their knowledge into security sign-off.

Speakers

Anika Malhotra Headshot

Vikas Gautam

Vice President of R&D
Synopsys

Vikas Gautam is Vice President R&D at Synopsys, responsible for functional safety solutions, verification IP and methodology.  He completed his Master’s in Computer Engineering from University of Mumbai.  He currently leads the R&D teams for verification IP for simulation, emulation, and functional safety solutions.  He has been working at Synopsys for 21+ years and during this period has led the development and deployment of simulation, testbench technologies, verification methodologies and verification IP.  

Anika Malhotra Headshot

Andrew Dauman

Vice President of Engineering
Tortuga Logic

Andrew Dauman is Vice President of Engineering at Tortuga Logic and is responsible for all product development. Prior to joining Tortuga Logic, Mr. Dauman was Vice President of Engineering at Synopsys, where he oversaw development of FPGA products, including the Synplify family of FPGA synthesis tools and the HAPS FPGA-based prototyping systems. Previously, Mr. Dauman served as Vice President of Engineering for Synplicity, Inc., and has held a variety of positions in both semi-custom processor design and software development for radar systems and logic synthesis. Mr. Dauman holds a B.S. in Electrical Engineering from Boston University.

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