DAC 2017 Verification Lunch Panel

DAC 2017

SoC Leaders Verify with Synopsys

On June 20, 2017, Synopsys hosted a luncheon event at DAC in Austin, Texas. At this event, industry leaders AMD, Intel, NXP, Qualcomm and Wave Computing shared their insights on managing the growing verification complexity and how they have achieved success by collaborating with Synopsys.


Michael Sanie

Vice President, Verification Marketing, Synopsys
Welcome and Verification update

Chris Tice

Vice President, Verification Continuum Solutions, Synopsys
The Peta Cycle Challenge

Alex Starr

AMD Senior Fellow, AMD
Taking Pre-Silicon Software Testing to the Next Level

Iredamola Olopade

Principal Engineer, Intel
Static Tools for Complex Designs

Sanjay Gupta

Director of Engineering, Qualcomm
Verification Continuum for Low Power Mobile SoCs

Jonathan Mccallum

Global Emulation Architect Lead, NXP
Alleviating SoC Complexity with a True Shift Left Development Environment and Testing Ecosystem

Bruno Bratti

Principal Engineer, Wave Computing
Addressing Hardware and Software Verification Challenges of Silicon for Machine Learning with Synopsys ZeBu Emulation