AMS SIG India 2020

Wednesday, February 12, 2020, 10:00 a.m. - 4:45 p.m.

Radisson Blu Bengaluru
90/4 Outer Ring Road
Marathahalli
Bengaluru 560037

The explosive growth of 5G, mobile edge-computing and automotive electronics mandate the next wave of Analog Mixed Signal (AMS) product innovations to be faster, smaller, more energy efficient and yet cost competitive.  In the meantime, the accelerated pace to broadly deploy advanced node processes, pushes the envelope of design complexity while increasing the need to efficiently verify design reliability and variability. 

AMS design productivity is hitting a wall!

We are very excited to bring you the Synopsys India AMS SIG 2020 to be held on Feb 12, 2020 at the Radisson Blu Bengaluru, Outer Ring Road, Marathahalli.

You will hear first-hand from world-class IC companies on how they are addressing these challenges.  You will also learn about the latest advances in Synopsys AMS solutions that can accelerate your robust AMS designs.

This event will include a panel discussion, “5G to AI – Analog  is Everywhere”, featuring a distinguished group of semiconductor design experts.  You will find out what’s keeping them awake at night!

The event will conclude with a networking and cocktail hour.

Agenda

10:00 a.m. - 10:45 a.m.

Registration

10:45 a.m. - 11:00 a.m.

Welcome

11:00 a.m. - 11:30 a.m.

Synopsys: Design and Simulation Requirements for Mixed-Signal, High-speed SerDes IPs

11:30 a.m. - 12:00 p.m.

MediaTek: Adopting Synopsys' Custom Compiler™ Design Environment for SRAM design - How We Earned Our Vacation!

12:00 p.m. - 12:30 p.m.

Arm®: Scaling Up Characterization Workloads on Cloud

12:30 p.m. - 1:45 p.m.

Lunch

1:45 p.m. - 2:15 p.m.

WDC: Unified UVM Co-Sim Environment for NAND Full-Chip Verification

2:15 p.m. - 2:45 p.m.

STMicroelectronics: Managing Variability in Memory Designs Using Synopsys' HSPICE® Circuit and  CustomSim™ FastSPICE Simulators

2:45 p.m. - 3:15 p.m.

Tea/Booth Time

3:15 p.m. - 3:45 p.m.

Synopsys MSIP: Design and Optimization of 112Gbps Ethernet PHY IP using Synopsys' Custom Design Platform

3:45 p.m. - 4:30 p.m.

Panel Discussion: From 5G to AI – Analog is Everywhere

4:30 p.m. - 4:45 p.m.

Closing Remarks

4:45 p.m. - 5:45 p.m.

Booth Time

5:45 p.m. - 7:00 p.m.

Networking and Cocktails

Live Demo Stations

Accelerating Custom Design and Layout Development using Custom Compiler

Live demo station showcasing advanced and productivity improvement features in custom design and layout. Synopsys product engineers will walk you through cutting edge technologies in Custom Compiler

Advances in Circuit Design Verification

Live demo station showcasing advanced technologies in AMS verification. Synopsys product engineers will walk you through FineSim Analog and RF verification flow and advanced Monte-Carlo analysis methodologies.

Register now. We look forward to seeing you there!