HAPS Datasheets

Systems

 

HAPS Prototyping Solution
The HAPS-80® prototyping solution offers an integrated prototyping flow focused on the highest performance, modularity, scalability, real world IO connectivity, debug productivity and shortest time to prototype.

HAPS-80 Systems
The HAPS-80 series, using Xilinx Virtex® UltraScale™ VU440 FPGAs for capacity over 1.6 billion ASIC gates,
 is available in 1, 2, or 4 FPGA module configurations.

HAPS-70 Systems
The HAPS-70 series delivers automation, advanced design planning, and SoC validation, using Xilinx Virtex®-7 FPGAs for capacity up to 144 million ASIC gates.


Daughter Boards

 

I/O
Interfaces supporting standard protocols

 

RISER8_MGB Board
The HAPS® RISER8 Multi-Gigabit Board (MGB) is a right-angled eight-lane connector to ease connection of MGB boards to HAPS prototyping systems. Supports existing HAPS MGB interface boards such as QSFPPLUS_MGB, PCIE-4_MGB, SATA-4_MGB, and ETH-4_MGB.

GPIO Interface Board
The HAPS® General Purpose I/O (GPIO) is a multi-purpose interface debug board used to access internal FPGA signals on the HAPS prototyping system. The GPIO_HT3 board can be set up for specific debug interfaces with an ARM debug, 3.3V GPIO, VCCO-level GPIO, micro-USB port, serial LCD, buttons, LEDs, and single-ended and differential clock connectors.

QSFP+ Interface Board
The HAPS® QSFP+ is a dual 4-channel QSFP+ high speed transceiver interface board that supports up to eight high speed serial links at 10 Gbps per link. With the use of off-the-shelf adapter modules, this high speed transceiver board can support many protocols, such as QSFP+, SFP+, CX4, 40G Ethernet, 10G Ethernet, SAS and others.

LAI_HT3 Daughter Board
The HAPS® Logic Analyzer Interface (LAI_HT3) board allows probing of dedicated signals with standard Logic Analyzers. The LAI_HT3 is a pass-through board for all power and I/O signals passing through a single HapsTrak 3 connector on a HAPS system.

USB3_HTII
The USB3_HTII is a HAPS daughter board providing a single port USB 3.0 physical layer interface. The daughter board supports USB 3.0 Device operation when utilized alongside the DesignWare USB 3.0 digital controller IP (sold separately) or other 3rd party controller IP.

 

Memory
Memory Types

 

HAPS LPDDR4 Memory Board
The HAPS LPDDR4 daughter board enables prototyping a design in context of LPDDR4 memory. The HAPS LPDDR4_HT3 daughter board contains two 32-bit, low-power, double data rate memory devices. Two memory buses are independently connected to three HapsTrak 3 connectors to support either two separate 512Mx32- bit memory interfaces or a single 512Mx64-bit memory interface. Each bus includes both data and control/address signals.

 

Interconnect System Components
HAPS to HAPS accessories

 

HapsTrak 3 Interconnect Board
The HAPS® CON_HT3 interconnect board aids in the building of point-to-point connections between two FPGAs in the HAPS prototyping system. The CON_HT3 board connects 48 user I/O signals while power pins are disconnected.

External Clock Distribution Board
The HAPS® External Clock Distribution Board (ECDB) extends direct synchronization of clocks to connect or interface up to six HAPS systems together. The HAPS ECDB automatically replicates input clocks to the output clocks to support up to twelve clocks across six HAPS-60 or HAPS-70 systems capable of supporting up to 288M ASIC gates.
 

 

HAPS Deep Trace Debug
High-capacity debug storage for HAPS

 

HAPS Deep Trace Debug System
HAPS Deep Trace Debug (DTD) System contains a HAPS-DX7 system, cables, and interface accessories to enable high-capacity debug of an ASIC design partitioned across up to 4 FPGAs of a HAPS-70 system. The system establishes electrical connections between a HAPS-70 system and the HAPS-DX system which serves as the debug control and storage system.

HAPS Deep Trace Debug 4-FPGA Kit
HAPS Deep Trace Debug (DTD) 4-FPGA Kit contains cables and interface accessories to enable high-capacity debug of an ASIC design partitioned across up to 4 FPGAs of a HAPS-70 system. The kit establishes the electrical connections to a HAPS-DX system which serves as the debug control and storage system for the HAPS-70 system.

HAPS Deep Trace Debug 4-FPGA Add-On Pack
HAPS Deep Trace Debug (DTD) 4-FPGA Add-On Pack is an optional add-on for the HAPS DTD 4-FPGA Kit (sold separately). It contains cables and interface accessories to incrementally add up to 4 more FPGAs, maximum of 8, to a multi-FPGA HAPS DTD scenario. The add-on pack establishes the electrical connections to a HAPS-DX system which serves as the debug control and storage system for the HAPS-70 system.

HAPS Deep Trace Debug Set
HAPS® Deep Trace Debug (DTD) Set contains a sample storage board, cables, and interface accessories to enable high-capacity debug of an ASIC design partitioned across up to 4 FPGAs of a HAPS-70 system.


Add-on Products

Includes Universal Multi-Resource Bus (UMRBus) for host workstation connectivity to HAPS and IP for co-simulation or transaction-based verification with HAPS.

HAPS UMRBus Interface Kit
The HAPS UMRBus (Universal Multi-Resource Bus) Interface kit is a complete and reliable set of components that allow bi-directional data exchange (at runtime) between software (C/C++ or Tcl/TK applications) and hardware (DUT).

HAPS Co-Sim and Transaction-Based Validation Suite

The HAPS®-70 Co-Simulation (Co-Sim) and Transaction-Based Validation (TBV) Suite and the HAPS-60 Co-Sim and TBV Suite products for the HAPS Series are a comprehensive set of software tools and libraries that enables the connection between a HAPS Series FPGA-based prototyping system and a host workstation.