ZeBu co-simulation provides the performance required for large scale SoC verification in a proven simulation environment and the ability to run the same test environment in both simulation and emulation to aid model bring-up and analysis. All ZeBu emulators are capable of HDL co-simulation, functioning as a simulation accelerator to provide higher simulation throughput. Requiring no changes to your existing verification environment, it provides acceleration even for testbenches that rely on the most advanced verification methodologies by offloading the device-under-test (DUT) simulation to the emulation hardware. Furthermore, the use of ZeBu emulators in HW verification can be extended to the transaction-level, enabling even greater performance gains. ZeBu emulators are compatible with advanced verification methodologies such as UVM and VMM, and fully support all popular simulators including Synopsys VCS, Cadence® Incisive® and Mentor Graphics® Questa®.