Simulation and Analysis Environment (SAE)

Native Simulation & Analysis Environment for HSPICE, CustomSim and FineSim

Synopsys’ Simulation and Analysis Environment (SAE) is a comprehensive transistor-level simulation and analysis environment that is tightly integrated and included with Synopsys’ HSPICE®, FineSim® and CustomSim™ circuit simulators. The netlist-based flow of SAE provides intuitive and comprehensive capabilities to efficiently set up and launch simulations, and analyze and explore simulation results to improve the productivity of analog verification.

Capabilities

  • Netlist-based flow for direct import of SPICE, Verilog and DSPF
  • Unified setup for corners, sweeps across multiple testbenches and Monte Carlo analysis
  • Language-sensitive text editor for netlist-based navigation, cross-probing and syntax checking
  • Automated regression capability with industry-standard TCL scripting language
  • Advanced job distribution and monitoring for batch-mode simulations with remote grid support
  • Single common testbench usage for both pre- and post-parasitic phases of design verification
  • Includes Library Manager and Hierarchy Editor capabilities for Multi-user and mixed-signal verification support
  • Integration with Synopsys' Custom WaveView™ graphical waveform viewer for extensive post-processing of waveforms
  • Advanced visual data navigation and data mining features, such as charting, statistical analysis, histograms and scatterplots
  • Detailed report generation, including web-based HTML documentation
Simulation and analysis environment flow

Simulation and Analysis Environment flow