In this workshop, you will learn the basic concepts of crosstalk, their effects on timing and noise, how PrimeTime SI can be used to identify these effects, and how PrimeTime SI can be used to create ECO change list (including physically-aware), and signoff leakage recovery to guide the place and route tools in the fixing of violations. You will apply the PrimeTime SI flow and methodology for chip-level crosstalk analysis. The labs will demonstrate the use of PrimeTime SI to analyze crosstalk failures on an actual design.
Best practice methodologies will give you the insights to drive the PrimeTime SI tool at its optimum performance and to generate quality results.
Hands-on labs follow each training module, allowing you to apply the skills learned in lecture.
At the end of this workshop you should be able to:
- Run PTSI for crosstalk delay and noise analysis
- Use the key reports in the shell and GUI to identify violations due to crosstalk, and to guide timing closure
- Define clock relationships for improved timing accuracy
- Apply useful commands to catch and report incomplete inputs to PTSI
- More finely control PTSI and your fixing tool using the following techniques
- Manually control delta delay and noise calculations for specific nets
- Apply path-based analysis
- Perform automated ECO fixing flow (including physically-aware) and leakage recovery to design
Design or verification engineers performing block- and chip-level static timing analysis for signoff.
Students are expected to have taken the PrimeTime workshop, or have the necessary experience to be able to load designs and constraints into PrimeTime, run PrimeTime, and interpret PrimeTime reports.
- Run PrimeTime SI: Crosstalk Delay
- Completing your Inputs for PTSI
- Run PrimeTime SI: Crosstalk Noise
- Improving Analysis Accuracy
- Physically-aware ECO and Sign-off Leakage Recovery Flows
Synopsys Tools Used