PrimePower

Overview

In this course, you will study PrimePower's signoff power analysis capability to accurately analyze peak power, average power, clock network power, and multi-voltage power.

Skills learned include:

• Determining possible analysis methods, based on the available data and the application needs
• Applying a methodology to confirm that the power analysis performed was complete and correct
• Applying debugging technique(s) if necessary
• Generating and interpreting all of the standard PrimePower reports for switching activity peak power, average power, clock network power, and multi-voltage power analysis
• Generating and viewing peak-power waveforms

To analyze power on multi-voltage designs, you will be using the unified power format (IEEE 1801 UPF) based flow.

Objectives

At the end of this workshop the student should be able to:

• Read the required timing and power data; verify their completeness
• Perform peak and average power analysis in the GUI and shell interface
• Perform SDC clock-frequency-based power scaling in VCD/SAIF average power flow
• Generate VCD and SAIF switching activity files by simulating RTL and gate-level designs
• Distinguish between event-based and cycle-accurate peak power (CAPP) analysis
• Perform delay shifted peak power using RTL/ZD-GL FSDB/VCD
• Dump and view peak power waveforms
• Perform conditional peak power analysis
• Determine quality of analyses from switching activity and power reports
• Estimate pre-layout clock-tree power
• Annotate clock-network power
• Determine power savings due to clock gating
• Specify PVT corner and libraries for multi -voltage power analysis
• Interpret UPF power intent of a multi voltage design
• Perform UPF-flow-based multi-voltage power analysis
• Perform concurrent multi-rail power analysis using UPF

Audience Profile
Design or Verification engineers who need to choose an appropriate analysis technique and perform signoff power and multi-voltage design analysis using PrimePower.
 

Prerequisites
To benefit the most from the material presented in this workshop, students should:

A. Have taken the PrimeTime workshop

OR 

B. Possess equivalent knowledge with PrimeTime including: 

• Restoring a previously-saved design
• Reading and linking a design
• Applying timing constraints
• Generating and interpreting timing reports using the report_timing command
   

Course Outline

Day 1:

• Introduction to Power Analysis
• Average Power Analysis
• Peak Power Analysis
• Clock Network Power Analysis
• Multivoltage Power Analysis
    

Synopsys Tools Used

• PrimePower 2018.06
• Verdi/nWave 2017.12-SP2
• VCS 2017.12-SP2