- Silicon Design & Verification
- Products
- Solutions
- Resources
- Services
- Community
- Training
- Silicon IP
- Products
- Markets
- Newsletter
- Customer Success
- News
- Resources
- Software Integrity
- Tools & Services
- Integrations
- Solutions
- Training
- Customers
- Resources
- Partners
- Blog
- Company
- About Us
- Investor Relations
- Community
- Newsroom
- Resources
- Careers & Culture
< Silicon Design & Verification
Silicon Design & Verification
< Products
< Products
< Products
< Products
< Products
< Products
< Products
< Products
< Silicon Design & Verification
< Solutions
< Solutions
Cloud
Synopsys in the Cloud
< Solutions
< Solutions
< Solutions
< Solutions
Photonic Solutions
RSoft Photonic Device Tools
Photonic System Tools
PIC Design Software
OptoCompiler
< Silicon Design & Verification
< Resources
< Resources
Verification
Articles
Blogs
Datasheets
Events
News
Newsletters
Success Stories
Videos
Webinars
White Papers
< Resources
< Silicon Design & Verification
< Services
< Services
< Services
< Silicon Design & Verification
< Community
Community
Community Overview
< Community
< Community
< Community
< Community
< Silicon Design & Verification
< Training
< Silicon Design & Verification
Training
Training and Education
< main menu
< Silicon IP
Silicon IP
< Products
< Products
Processor Solutions
ARC Processor IP
Embedded Vision Processor IP
Development Tools
Operating Systems
Ecosystem
ASIP Tools
< Products
Memories & Libraries
Logic Libraries
Memory Compilers
Duet Packages
HPC Design Kit
PVT Sensors
Non-Volatile Memory
< Products
< Products
Analog IP
Data Converters
< Products
< Products
< Products
< Silicon IP
< Markets
< Silicon IP
Newsletter
< Silicon IP
Customer Success
< Silicon IP
News
< Resources
< Resources
< main menu
< Software Integrity
Software Integrity
< Tools & Services
< Tools & Services
< Tools & Services
< Software Integrity
Integrations
< Solutions
< Solutions
< Solutions
< Training
< Training
Product Education
< Training
Community
< Software Integrity
< Software Integrity
Customers
< Resources
< Resources
< Software Integrity
< Software Integrity
Partners
< Software Integrity
Blog
< main menu
Software Integrity
Software Integrity
+
Tools & Services
Integrations
+
Solutions
+
Training
Customers
+
Resources
Partners
Blog
< About Us
Company
< About Us
< About Us
About Us
About Us
< Investor Relations
< About Us
Investor Relations
Investor Relations
< Community
< About Us
Community
Community
< Newsroom
< About Us
Newsroom
Newsroom
< Resources
< About Us
Resources
Resources
< Careers & Culture
< About Us
Careers & Culture
Careers
< main menu
Bluetooth LE HOGP Host Test Suite Data Sheet
Test Suite:
Bluetooth LE HOGP Host Test SuiteDirection:
ClientHuman Interface Device protocol (HID) also known as HID Over GATT Profile (HOGP) is used to connect human interface devices such as keyboards and mouses to a host device. Bluetooth LE HOGP Host Test Suite can be used to test the robustness, security and reliability of Bluetooth LE central devices implementing HID over GATT profile's host role. It discovers faults in a target software by feeding it with invalid, incorrect and malformed data and data structures.
Used specifications
Specification
Title
Notes
HID over GATT Profile Specification
HID over GATT Profile Specification
HID Service Specification
HID Service Specification v1.0
Bluetooth Core Specification 5.2 - Volume 3, Part G - Generic ATT Profile
Bluetooth Core Specification 4.0 - Volume 3, Part G - Generic ATT Profile
Supported on applicable parts
Tool-specific information
Tested functionality
Protocol Mode Characteristics
HID Information Characteristics
Report Map Characteristics
Report Characteristics
Test tool general features
- Fully automated black-box negative testing
- Ready-made test cases
- Written in Java(tm)
- GUI command line remote interface modes
- Instrumentation (health-check) capability
- Support and maintenance
- Comprehensive user documentation
- Results reporting and analysis