SPIE Advanced Lithography 2020

February 23-27, 2020
San Jose McEnery Convention Center

Synopsys Technical Forum

Monday, February 24
12:30 p.m. to 4:30 p.m. 

San Jose Marriott Hotel
Salon IV Ballroom
301 South Market Street
San Jose, CA 95113

IMPORTANT NOTE: The location has changed from the San Jose Hilton in 2019 to the Marriott Hotel this year. See you at the Marriott!

Please join us for our 2020 Technical Forum to learn the latest on Synopsys Manufacturing's mask synthesis, mask data prep and lithography simulation solutions. The Technical Forum is peer-to-peer, giving you the opportunity to hear how your lithography colleagues have addressed the challenges of 3/5nm and beyond.


Time Presentation Title Speaker Company
12:30 Registration & Lunch
1:10 Welcome and Introduction
Siva Yerramilli
1:45 The Complete Picture: How Simulation Helps Avoid and Overcome On-Wafer Roadblocks
Sagarika Mukesh
2:15 Break and Drawing #1
3:00 Accelerated Rigorous M3D Verification for Advanced Detection of DRAM Hotspot Failures
Juntaek Park
SK Hynix
3:30 Navigating The New Landscape of Challenges Facing Design and Lithography Within The Era of 3-D Integrated Devices
Anton Devilliers
4:15 Thank You and Drawing #2

Visit Synopsys at Booth #204

Tuesday, February 25: 10:00 a.m. - 5:00 p.m.            
Wednesday, February 26: 10:00 a.m. - 4:00 p.m.


San Jose McEnery Convention Center
San Jose, CA


Synopsys provides industry-proven EDA solutions to meet the demands of today’s advanced IC manufacturing processes while setting the standard in platform flexibility to enable innovative and custom solutions for next-generation technology nodes. Synopsys’ comprehensive Mask Synthesis, Mask Data Preparation, TCAD, and Yield Management tools provide leading edge performance, accuracy, quality, and cost of ownership for all your production and development needs.

Synopsys Technical Program

  • Lithographic pattern formation in the presence of aberrations in anamorphic optical systems
    Zac A. Levinson, Synopsys, Inc. (USA); Bruce W. Smith, Rochester Institute of Technology (USA) [11323-6]
    Monday, 1:20 p.m. to 3:20 p.m.

  • EUV lithography stochastic simulations of a MOx-specific parameterized resist model: calibration and comparisons with experimental data
    Craig D. Needham, Amrit K. Narasimhan, Inpria Corp. (USA); Lawrence S. Melvin, Synopsys, Inc. (USA); Ulrich Welling, Synopsys GmbH (Germany); Stephen Meyers, Inpria Corp. (USA) [11323-12]
    Monday, 3:50 p.m. to 5:50 p.m.
  • Prediction of EUV stochastic microbridge probabilities by lithography simulations
    Erik A. Verduijn, Synopsys GmbH (Belgium); Ulrich Welling, Jiuzhou Tang, Hans-Jürgen Stock, Ulrich Klostermann, Wolfgang Demmerle, Synopsys GmbH (Germany); Peter De Bisschop, imec (Belgium) [11323-16]
    Tuesday, 10:30 a.m. to 12:30 p.m.

  • EUV resist chemical gradient enhancement by UV flood exposure for improvement in EUV resist resolution, process control, roughness and sensitivity
    Seiji Nagahara, Tokyo Electron Ltd. (Japan); Cong Que Dinh, Tokyo Electron Kyushu Ltd. (Japan); Keisuke Yoshida, Tokyo Electron Kyushu Ltd. (Belgium); Gosuke Shiraishi, Yoshihiro Kondo, Kosuke Yoshihara, Tokyo Electron Kyushu Ltd. (Japan); Kathleen Nafus, Tokyo Electron America, Inc. (Belgium); John S. Petersen, Danilo De Simone, Philippe Foubert, Geert Vandenberghe, imec (Belgium); Hans-Jürgen Stock, Balint Meliorisz, Synopsys GmbH (Germany) [11326-9]
    Tuesday, 10:30 a.m. - 10:50 a.m.

  • Establishing fast, practical, full-chip ILT flows using Machine Learning
    Tom Cecil, Ahmed S. Omran, Jason Shu, Amyn Poonawala, Clark Vandam, Jiechang Hou, Kyle Braam, Synopsys, Inc. (USA) [11327-4]
    Tuesday, 1:40 p.m. - 2:10 p.m.

  • Mask synthesis using machine learning software and hardware platforms
    Peng Liu, Synopsys, Inc. (USA) [11327-5]
    Tuesday, 2:10 p.m. - 2:40 p.m.

  • Simulation of photoresist defect transfer through subsequent patterning processes
    Dominik Metzler, IBM Thomas J. Watson Research Ctr. (USA); Sagarika Mukesh, Karthik Yogendra, IBM Corp. (USA); Mohamed Oulmane, Synopsys Switzerland, LLC (Switzerland); Phil Stopford, Lawrence Melvin, Synopsys, Inc. (USA) [11329-18]
    Wednesday, 8:00 a.m. to 10:00 a.m.

  • Rigorous simulation of implant resist on topographic wafer
    Jirka Schatz, GLOBALFOUNDRIES Dresden Module One LLC & Co. KG (Germany); Bernd Küchler, Wolfgang Hoppe, Synopsys GmbH (Germany); Dimitrios Tsamados, Synopsys GmbH (Switzerland) [11327-15]
    Wednesday, 8:40 a.m. - 9:00 a.m.

  • Implementing Machine Learning OPC on product layouts
    Kevin Hooker, Marco Guajardo, Hesham Abdelghany, Synopsys, Inc. (USA); Chia-Chun Lu, Synopsys, Inc. (Taiwan)  [11328-4]
    Wednesday, 9:20 a.m. - 9:40 a.m.

  • Advanced memory cell design optimization with inverse lithography technology
    Jiro Higuchi, Weiting Wang, Takamasa Takaki, Hiromitsu Mashita, Shigeki Nojima, Kioxia Holdings Corp. (Japan); Ahmed S. Omran, Synopsys, Inc. (USA); Ken Hanafusa, Nihon Synopsys G.K. (Japan); Seung-Hee Baek, Synopsys Korea Inc. (Korea, Republic of); Ryan Chen, Synopsys, Inc. (USA); Yukio Asaka, Nihon Synopsys G.K. (Japan); Kyle Braam, Synopsys, Inc. (USA); Hironobu Taoka, Nihon Synopsys G.K. (Japan); Guangming Xiao, Synopsys, Inc. (USA) [11328-5]
    Wednesday, 9:40 a.m. - 10:00 a.m.

  • DTCO acceleration to fight scaling stagnation
    Lars W. Liebmann, Jeffrey Smith, Daniel Chanemougame, Tokyo Electron Ltd. (USA); Chia-Tung Ho, Jonathan Cobb, Pete Churchill, Synopsys, Inc. (USA) [11328-11]
    Wednesday, 1:40 p.m. - 2:10 p.m.

  • Integrating enhanced hotspot library into manufacturing OPC correction flow
    Bradley J. Falch, Linghui Wu, Synopsys, Inc. (USA); John Tsai, Synopsys Taiwan Co., Ltd. (Taiwan); Elsley Tan, Synopsys, Inc. (Taiwan); Jiunhau Fu, Tengyen Huang, Chuncheng Liao, Nanya Technology Corp. (Taiwan) [11328-13]
    Wednesday, 2:30 p.m. - 2:50 p.m.

  • Rigorous stochastic lithography modelling for defectivity reduction in EUV single expose patterning
    Ulrich Welling, Synopsys GmbH (Germany) [11323-39]
    Wednesday, 4:10 p.m. to 4:50 p.m.

  • An application study on the stochastic effect of EUV photons
    Jongsu Kim, Hyekyoung Jue, Hyungju Ryu, Sang-Jin Kim, Joon-Soo Park, Kyoungsub Shin, SAMSUNG Electronics Co., Ltd. (Korea, Republic of); Eun-Soo Jeong, Sang-Yil Chang, Jung-Hoe Choi, Synopsys Korea Inc. (Korea, Republic of); Ulrich Welling, Jürgen Preuninger, Ulrich Klostermann, Hans-Jürgen Stock, Wolfgang Demmerle, Synopsys GmbH (Germany) [10323-45]
    Thursday, 8:00 a.m. to 10:20 a.m.

  • Multi-varied implementations with common underpinnings in Design Technology Co-Optimization
    Kevin Lucas, Tim Tsuei, Soo-Han Choi, John Kim, Synopsys, Inc. (USA) [11328-32]
    Thursday, 4:30 p.m. - 5:00 p.m.

  • Compact modeling to predict and correct stochastic hotspots in EUVL
    Zac A. Levinson, Yudhishthir Kandel, Qiliang Yan, Makoto Miyagi, Xiaohai Li, Kevin Lucas, Synopsys, Inc. (USA) [11323-71]
    Wednesday, 5:30 p.m. to 7:30 p.m.

  • Impact of flare on source mask optimization in EUVL for 7nm technology node
    Lisong Dong, Rui Chen, Taian Fan, Rongbo Zhao, Institute of Microelectronics (China); Yongdong Wang, Lawrence S. Melvin, Synopsys, Inc. (USA) [11323-81]
    Wednesday, 5:30 p.m. - 7:30 p.m.

  • Implementing Machine Learning for OPC retargeting
    Kevin Hooker, Marco Guajardo, Synopsys, Inc. (USA); Nai-Chia Cheng, The Univ. of Southern California (USA) [11328-50]
    Wednesday, 5:30 p.m. - 7:30 p.m.


Schedule a Meeting

If you are planning to attend SPIE Advance Lithography and would like to schedule an onsite meeting with the Synopsys Manufacturing team, please send an email to manufacturing@synopsys.com with your full name, business title, company name, phone number, and the subject you’d like to discuss.