PDK imec (ISIPP50G)

The silicon photonics design kit contains the building blocks for the Multi Project Wafer runs offered by imec for both their passive as well as active (ISIPP50G) platform and the imec Passive +

This PDK is a plug-in library for OptSim Circuit and OptoDesigner to support the Multi Project Wafer runs provided by imec. In addition to the photonic elements from the standard library, the PDK contains technology-specific information like mask layer names, design rules, validated building blocks for both circuit simulation and layout generation, die templates, and GDS file settings.

PDK contents for the active platform (ISIPP50G)

  1. Technology set-up files
  2. Material and cross-sectional information for simulations (like mode analysis including sweep on e.g. line width or silicon layer thickness variations)
  3. Die templates for layout generation
  4. In addition to the passive building blocks as listed above:
    • complete family of modulators (all for 1550 TE)
    • 3 P and N-type doping levels for custom electro-optic modulator design
    • phase shifters (1550 TE)
    • detectors (Ge PD Vertical, Ge PD Vertical with Pads (different speeds, all 1550)
    • pads for P and N contacts and standard pads
    • heater: 50 Ohms resistor
    • 2 levels of metal interconnect
  5. Design Rules
  6. GDS generation

PDK contents for the passive platform

  1. Technology set-up files
  2. Material and cross-sectional information for simulations (like mode analysis including sweep on e.g. line width or silicon layer thickness variations)
  3. Die templates for layout generation
  4. Set of passive building block models for circuit simulation and layout generation:
    • waveguide definitions (rib and strip for 1550 TE and 1310 TE)
    • fiber chip couplers (curved 1550 TE, curved 1550 TM, raised 1550 TE, raised & curved 1550 TE, straight 1550 TE, curved 1310 TE, straight 1310 TE)
    • edge couplers
    • MMIs for splitting or combining (1x2, 2x1, 2x2; 1550 TE and 1310 TE)
    • waveguide crossing (1550 TE)
    • heaters for thermo-optic modulation
  5. Design Rules
  6. GDS generation

imec Passive+ Key Features

Imec Passive+ is a subset offer by the foundry of the imec ISIPP50G PDK. Some of the features (some layers and subsequently components based on those layers) will not be available on the passives+ MPW runs. Key features include:

  • The device layer of SOI wafers is etched at three different depths to enable integration of different photonic functions.
  • A patterned poly-Silicon layer improves the performance of grating couplers for out-of-plane coupling to fibers.
  • A deep etched trench at an edge of the chips, combined with edge-coupler components, provides optical access, with a broader optical bandwidth.
  • A layer for metal-based heaters enables thermal tuning of the optical functions.
  • Electrical access to the metal heaters is established through two additional levels of metal interconnect.
  • The imec Si-Photonics Multi Project Wafer service (MPW) serves datacom and telecom applications, but also welcomes designs for other applications, e.g. sensing.

imec Multi Project Wafer Runs

EUROPRACTICE offers access to imec Multi Project Wafer services, the schedule for the Multi Project Wafer runs can be found here.

Training

Regular training sessions are being organized to introduce the technology and software tools to (potential) users.

Many of our solutions come with a free evaluation, including interactive web demonstrations. Complete our online inquiry form to ask for a free evaluation.