Optical Networking and Communication Conference (OFC) 2019

Location

San Diego Convention Center
San Diego, CA
March 3-7, 2019
Synopsys Booth #2831

Exhibition Hours

Tues, March 5, 10:00 a.m. – 5:00 p.m.
Wed, March 6, 10:00 a.m. – 5:00 p.m.
Thurs, March 7, 10:00 a.m. – 4:00 p.m.

Special Events at OFC 2019

Booth Presentation: Probabilistic Constellation Shaping in RSoft OptSim

Tuesday, March 5, 11:00 am - 12:30 pm
Booth 2831

Presented by: Dario Pilori, Ph.D. Candidate, OptCom Group, Department of Electronics and Telecommunications (DET)

Presentation of probabilistic constellation shaping (PCS), which is an essential element for state-of-the-art optical communication systems. It offers both a sensitivity gain, due to a better match between constellation and channel, and high data-rate flexibility through changing the constellation probability. The demo still show to evaluate the performance of a PCS transmission in OptSim™ using the Generalized Mutual Information (GMI) metric.

Synopsys Evening Reception

Tuesday, March 5, 5:00 p.m. - 7:00 p.m.
Room 28C-D, Upper Level, San Diego Convention Center

Join us for food and drinks, talk with our experts, share ideas with other users, and see our latest design solutions for optical datacom, including innovations in the RSoft device tools, OptSim, ModeSYS, OptSim Circuit, OptoDesigner, and DesignWare IP.

Please RSVP before the event if you plan to attend the reception. We hope to see you there!

Booth Presentation: Design Enablement for TowerJazz Silicon Photonics Process by Synopsys' PIC Design Suite

Wednesday, March 6, 1:30 - 2:00 pm
Booth 2831

Presented by: Dr. Samir Chaudhry, TowerJazz and Pablo Mena, Synopsys

Presentation of the TowerJazz PDK implementation in the Synopsys PIC Design Suite, which includes the OptSim Circuit and OptoDesigner tools. The demo will show how the PIC Design Suite offers a complete, seamless design flow with photonic-aware physical layout capabilities including bidirectional interface between OptSim Circuit and OptoDesigner for an efficient PIC design workflow and full support for schematic-driven layout (SDL).

PIC Workshop

Wednesday, March 6, 5:45 p.m. - 8:30 p.m.
Room 29ABCD, San Diego Convention Center

Synopsys will participate in this interactive workshop with key PIC service providers involved in the design, fabrication, and packaging of photonic chips. Several presentations will be made by solution providers and companies using PICs. For more information, and to view sponsors and speakers, visit the 7 Pennies website.

Overview

The Optical Networking and Communication Conference and Exposition (OFC) is the largest international event for latest advances in telecom and data center optics. The conference includes technical sessions, short courses, workshops, and panel discussions that focus on the newest research and developments as well as the latest applications.

Products and Services

Synopsys will demo the following optical datacom and high-speed IP solutions at OFC 2019.

RSoft Device Tools

The RSoft photonic device tools support the design and simulation of both passive and active photonic devices for optical communications, optoelectronics, and semiconductor manufacturing. The demo will highlight the latest innovations in the tools, such as new features to advance the design of optics used in AR/VR systems, as well as for the design of photonic integrated circuits (PICs) and creation of process design kits (PDKs).

OptSim & ModeSYS
The RSoft OptSim and ModeSYS tools simulate the performance of optical datacom system links through comprehensive simulation techniques and component models. The demo will highlight features to evaluate PIC performance in the context of an optical datacom system.

PIC Design Suite: OptoDesigner & OptSim Circuit
Synopsys is driving the advancement of photonic integrated circuit technologies with its PIC Design Suite, which comprises the OptSim Circuit and OptoDesigner tools. The demo will show how the PIC Design Suite offers a seamless design flow with photonic-aware physical layout capabilities enabled by support for foundry-specific PDKs.

400G Hyperscale Data Centers with DesignWare 56G Ethernet PHY IP
See how you can use the PAM-4 DesignWare 56G Ethernet PHY IP to support optical and copper interconnects to enable your 400G hyperscale data center SoCs. The demo will show the transceiver IP performance exceeding the standard specification limits for jitter and interference tolerance. The scalable IP architecture enables easy migration to 800G Ethernet applications.

To Schedule a Meeting

If you are planning to attend OFC and would like to schedule an on-site meeting or product demo with Synopsys, send an e-mail to photonics@synopsys.com or call 626-795-9101.