From Ideas to Wafer-Runs: Design Flow and Modeling Challenges in Photonic Integrated Circuits
Tuesday, 24th October 2017
9:00 am to 12:00 pm
1655 N Central Expy
Richardson, TX 75080
Presenters: Dr. Chenglin Xu and Jigesh Patel
Synopsys Optical Solutions Group
The Dallas IEEE Photonics Society is hosting a workshop on Silicon photonics and photonic integrated circuits. Live demonstration sessions will introduce participants to simulations of typical design flow for photonic integration from ideas to wafer-runs.
The workshop will have four parts:
- Overview of silicon photonics building blocks and basic circuits
- Design and optimization of passive and active photonic devices at the physical level
- Schematic-driven design and layout of photonic integrated circuits (PICs) using a foundry-provided platform design kit (PDK) and user-designed devices
- Mask layout of PIC designs, and procedures to export PICs to linked foundries for processing
The speakers will be available for discussions after the workshop. This event is free and open to the public. Refreshments and lunch will be provided to pre-registered attendees.
Register online or by email to email@example.com by Friday, October 20th. Remote attendance via WebEx is also offered. Please contact us via email to obtain the link.