Innovative Ideas for Predictable Success
      Volume 2, Issue 4


   Customer Spotlight
Spotlight Delivering Simultaneous Silicon and Software
A chip is of little use without its software. The semiconductor industry realizes this and is more interested than ever in delivering both silicon and software at the same time. Texas Instruments has combined a number of strategies to reduce software integration time from around 18 months to just one to two months. Kalyan Chakravadhanula, Platform Validation Engineer with TI, explains how his team has been working successfully with Synopsys and used DesignWare® Virtual Platform to validate a complex system-on-chip based on TI's OMAP™ platform.

Before accepting delivery of a new chip, TI's customers are increasingly interested in seeing proof of the new SoC designs working within a system context. This requires that the software – firmware and drivers – is available and debugged before system-level validation takes place.

TI's answer to this is to use Software Development Platforms (SDP), physical boards for software development and chip integration. The SDP provides a framework for developing and proving the entire system, including integration of the SoC with system functions such as GPS, WiFi and other functions.

The SDP is a complex system in its own right. It is essential to verify it properly before using it to validate the chip design.

Kalyan Chakravadhanula, Platform Validation Engineer with TI, is responsible for SDP validation. "Ultimately, the validation team's brief is straightforward. We have to avoid chip respins which cost the company about a million dollars per turn. If we can also accelerate the software development cycle and reduce post-silicon bench time, then the whole team and our customers benefit greatly."

TI's OMAP Platform
TI's OMAP platform provides a scalable family of processors designed for feature phones and multimedia-rich 3G wireless handsets. Leading handset manufacturers use it because it is an industry leading proven solution that delivers high-performance, ultra-low power consumption and enables affordable multimedia.

The SDP for one particular OMAP platform-based SoC needed to support a large number of components and interfaces. The SoC incorporated four processors, including multiple high-end ARM and DSP processors, complex on-chip buses, security hardware including ARM's TrustZone™ technology, and a range of interface standards.

Accelerating Software Development
The traditional software development process does not begin until there is a physical manifestation of the chip and the development board. Firmware debug and device driver development must wait until the chip is integrated with the board, which places software development and debug in the critical path of the project. Proper validation of the chip hardware cannot be undertaken until the validation software is available. The TI OMAP technology team uses virtual platforms to avoid the timescale penalties associated with the traditional sequential hardware-software development process.

Creating Virtual Platforms
TI has considerable experience in using virtual platforms. Kalyan Chakravadhanula explains: "DesignWare virtual platforms provide us with comprehensive models of our physical platforms. Virtual platforms combine high-speed processor instruction-set simulators and fully functional C/C++ transaction-level models (TLM) of the hardware building blocks to provide a high-level model of the hardware for early software development."

Two specification languages are used to create peripheral models for the virtual platform. The Magic-C semi-visual language allows control functions such as state machines to be captured in a graphical format. For data functions that require high simulation performance there is the Virtual Platform Runtime Environment (VRE) that consists of C++ combined with a set of standard transaction-level interfaces. "The use of a graphical language provides badly needed visibility and controllability over the peripheral hardware which may be deeply embedded within the SoC. It is this improvement in visibility and controllability that is the main contributor to the 2-5x increase in software development productivity we experienced with virtual platforms."

TI worked with Synopsys Professional Services to develop a virtual platform model for an OMAP platform-based SoC. "Synopsys has an excellent track record in creating high-quality virtual platform models that meet our exacting specifications, and always delivers them on time," says Chakravadhanula.

Software Development: Virtual Flow
Compared with a traditional approach to software development, the key benefit of using a virtual platform is the ability to develop and debug firmware before silicon is available (Figure 1). It is possible to achieve dramatic gains in software development time because of early access to fast, full-function software simulation, typically 9 - 12 months prior to silicon.

Figure 1: Software Development with Virtual Platforms

The TI OMAP technology team used Synopsys' DesignWare Virtual Platform to develop and debug the SDP software including the firmware software suite and system validation diagnostics. By creating the virtual platform to mirror the SDP, the team could emulate the switches on the hardware board and switch between different boot options, as well as read from and write to Flash and DDR memories.

The firmware development suite includes ARM9 and ARM11 boot code, device drivers for UART, I2C and Flash, and ‘boot from' Flash software. It was possible to debug all of this code well in advance of silicon availability. In addition, the team found and fixed several bugs in the internal library code.

Development of a complex system such as the OMAP platform requires input from many different teams – the availability of the virtual platform helps several of these teams. For example, the group tasked with developing the Layer 1 modem software could also benefit from the virtual platform by developing and validating the security ROM code several months ahead of SDP availability.

Virtual Platform Features
The TI OMAP technology team found that a number of features within Synopsys' DesignWare Virtual Platforms were particularly beneficial in verifying its SoC.

Development Tool Integration
Many TI engineers make extensive use of the TI Code Composer Studio™ code development tool and are familiar with its strong debug capabilities for ARM processors and DSP cores. Synopsys DesignWare Virtual Platforms support third-party tool integration and this capability enabled the team to make use of the software tools that they were familiar with, with no compulsion to learn new tools or change their development flow.

Synopsys' Innovator is a fully integrated development environment (IDE) for developing, running and debugging Virtual Platforms. Innovator includes a schematic editor, language editor, design browser to reconfigure IP components, hardware debugger and library manager. Use of Innovator contributed to TI's overall software development productivity as the built-in hardware debugger combined with the graphical Magic-C peripheral models allow software developers novel features like hardware breakpoints, single-stepping and state inspection at any desired design locations. This significantly improves visibility and controllability over the target hardware, resulting in a dramatic productivity improvement.

Another feature that improves productivity is the ability to quickly access components, their parameters and properties using a scripting language. This makes it easy for engineers to instantaneously load software binaries in Flash memory, for example, again contributing to the overall software productivity gain.

Debugging Multicore Architectures
The OMAP platform uses multiple cores and requires an appropriate multicore development environment. Synopsys DesignWare Virtual Platforms let engineers develop and simulate models that combine multiple instantiations of complex cores. Furthermore, the synchronous multicore debug capability ensures that halting one processor using a breakpoint will halt the other processors. This also stops all peripheral devices and leaves the system state intact and not corrupted by peripheral or system events. This powerful debug feature is critical in supporting multicore implementations.

Peripheral and I/O Support
The OMAP platform supports a range of connectivity and communication options. Synopsys DesignWare Virtual Platform provides extensive modeling support for I/O connectivity and peripheral devices. This capability lets engineers debug firmware associated with these features within the context of the entire system model.

"Our final model includes the SoC, the board-level components, several daughter cards, real world I/O, and board user interface emulation with GUI objects like buttons, LED, memory viewer and LCD. The system-level modeling capabilities of the DesignWare Virtual Platform let us create a complete virtual model of the SoC and simulate its I/O capabilities like USB and camera input, as well as the internal functionality," says Chakravadhanula.

Figure 2: Screenshot of the DesignWare Virtual Platform

Virtual Platform Results
The TI OMAP technology team realized a number of key benefits from using DesignWare Virtual Platforms during the development of its SoC.

The virtual platform approach allowed the team to develop software before the chip and board hardware was available. And by using binary compatible functional models to provide feedback on that hardware architecture, the software engineers could improve the quality of both the hardware and software design. This process identified and fixed specific bugs in the software library functions, and ensured that the software is available with the silicon.

Validating boot code in advance of the silicon availability helps to avoid potential silicon respins. TI estimates the cost of a silicon respin to be as much as $2 million.

Early validation of software drivers saved two months of post-silicon bench time, which is on the critical path of the project. This time saving enables faster market entry.

An accurate virtual platform model ensures binary compatibility between the virtual platform and the actual hardware, which means that software drivers developed for the virtual platform can run successfully on the real hardware with no modification.

Chakravadhanula concludes: "DesignWare Virtual Platforms give us an advanced modeling and debug capability that can handle very complex platform designs. We have proven the product on an extremely complex, time-critical commercial 3G cellular platform. The Virtual Platform approach allowed us to start developing firmware four months ahead of silicon, reduce the risk of silicon respin, and accelerate post-silicon bench time by two months. The sum benefit of this approach is that we improved our overall software development productivity by 2-5x."

Platform Validation Engineer
Kalyan Chakravadhanula has always been fascinated with consumer wireless products and his career started with Wi-Fi products followed by 3G cellular. He is currently working as a Project Lead/Validation Engineer for Texas Instruments' 3G Business Unit in San Diego. He has eight years of experience in system algorithms, ASIC design, and embedded software development at a system level. His roles at both fabless start-up and Fortune 500 semiconductor companies involved direct customer interaction. He represented TI in the JEDEC JC-61 standards organization. He gave presentations at the TI worldwide Systems and Software Symposium, SNUG 2007 and DAC 2007.

©2010 Synopsys, Inc. Synopsys and the Synopsys logo are registered trademarks of Synopsys, Inc. All other company and product names mentioned herein may be trademarks or registered trademarks of their respective owners and should be treated as such.

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-   Texas Instruments

-   Synopsys DesignWare Virtual Platform
"The sum benefit of this approach is that we were able to start software development several months prior to silicon and we improved our overall software development productivity by 2-5x."