DesignWare SHS Silicon Browser

The DesignWare SHS Silicon Browser GUI is intended for design and test engineers to enable the chip bring-up process and to fulfill memory characterization providing with a capability to communicate interactively to DesignWare SHS in the user chip via JTAG interface and to retrieve test responses, diagnostic/repair data on memories in DesignWare SMS.

Silicon Browser provides information on the failed DesignWare SHS and memory instances, and then immediately interprets the results of the stop on N-th diagnostic pattern run. It indicates the failed read operation in the test algorithm, reports and visualizes the failed logical and physical location, and performs detection and fault classification on the error.

FLow diagram of DesignWare SHS and SLT diagram

DesignWare SHS Silicon Browser

DesignWare SHS Silicon Browser IP for Embedded Memory Test and Repair

This demonstration will feature the post-silicon interactive automation capabilities of the DesignWare SHS Silicon Browser, which utilizes the DesignWare SHS Memory System's embedded test & repair IP solution.

Gevorg Torjyan
R&D Engineer

Yervant Zorian
Chief Architect

Highlights

  • Low-cost failure diagnostics solution for early silicon prototyping, minimizing ATE use
  • Easy USB to JTAG connection to the target chip
  • Runs on multiple system platforms (Windows, Linux)
  • Interactive communication to the DesignWare SHS in the chip; monitoring register values in the design; running DesignWare SHS in the chip both in parallel and serial modes
  • Interactive system debug, easy to use GUI-based dialogs
  • Editing/creating new test patterns; editing/creating test algorithms using multiple data background patterns and address sequencing
  • Immediate visualization of test run results

Current customers can find more product and entitlement information here.