TSMC Technology Symposium &
OIP Ecosystem Forum

August 24-25, 2020
Virtual Experience

Why Attend?

This year TSMC will be hosting their two major North America customer events virtually, the TSMC Technology Symposium and the TSMC Open Innovation Platform Ecosystem Forum on August 24 - 25. TSMC will provide an extensive update on the status of advanced semiconductor and packaging technology development in the Technology Symposium sessions. TSMC and its ecosystem partners will share the latest collaboration efforts in the TSMC Open Innovation Platform Ecosystem Forum.  Synopsys has a long-standing collaboration with TSMC and a common commitment to provide designers with the best IP, tools, design flows, and process technologies. We look forward to seeing you at this year’s event!

Speaker Spotlight

Aart de Geus headshot

Aart de Geus - Chairman and co-CEO, Synopsys

August 25, 2020 | 09:30 a.m. PDT

Since co-founding Synopsys in 1986, Aart has expanded Synopsys from a start-up synthesis company to a global high-tech leader. He has long been considered one of the world's leading experts on logic synthesis and simulation, and frequently keynotes major conferences in electronics and design automation. Dr. de Geus has been widely recognized for his technical, business, and community achievements with multiple awards including Electronic Business Magazine's "CEO of the Year," the IEEE Robert N. Noyce Medal, the GSA Morris Chang Exemplary Leadership Award, the Silicon Valley Engineering Council Hall of Fame Award, and the SVLG Lifetime Achievement Award. He serves on the Boards of the Silicon Valley Leadership Group, Applied Materials, the Global Semiconductor Alliance, and the Electronic System Design Alliance.

OIP Ecosystem Forum Track Sessions

HPC & 3DIC

Reliable Die-to-Die Interfaces for High-Performance Computing SoCs on TSMC's FinFET Processes


Scaling Physical Verification Workloads on the Cloud


Specialty Foundation IP for AI/ML SoCs on TSMC's 7nm and 5nm Processes


Mobile & Automotive

Accelerating Design at TSMC’s N5 Process Technology Node using Fusion Compiler and the wider Synopsys Digital Design Platform


Case Study: Design-in-the-Cloud: Myth and Reality


Enabling USB4 40 Gbps Designs on TSMC N5 & N6 Processes with DesignWare USB4 IP


IoT & RF

Transforming Multi-Die Integration with InFO Wafer Level Packaging