- Silicon Design & Verification
- Products
- Solutions
- Resources
- Services
- Community
- Training
- Silicon IP
- Products
- Markets
- Newsletter
- Customer Success
- News
- Resources
- Company
- About Us
- Investor Relations
- Community
- Newsroom
- Resources
- Careers
< Silicon Design & Verification
Silicon Design & Verification
< Products
< Products
< Products
< Products
< Products
< Products
< Products
< Silicon Design & Verification
< Solutions
< Solutions
< Solutions
Cloud
Synopsys in the Cloud
< Solutions
< Solutions
< Silicon Design & Verification
< Resources
< Resources
Verification
Articles
Blogs
Datasheets
Events
News
Newsletters
Success Stories
Videos
Webinars
White Papers
< Resources
< Silicon Design & Verification
< Services
< Services
< Services
< Silicon Design & Verification
< Community
Community
Community Overview
< Community
< Community
< Community
< Community
< Silicon Design & Verification
< Training
< Silicon Design & Verification
Training
Training and Education
< main menu
< Silicon IP
Silicon IP
< Products
< Products
Processor Solutions
ARC Processor IP
Embedded Vision Processor IP
Development Tools
Operating Systems
Ecosystem
ASIP Tools
< Products
Memories & Libraries
Logic Libraries
Memory Compilers
Duet Packages
HPC Design Kit
Embedded Test & Repair
Non-Volatile Memory
< Products
< Products
Analog IP
Data Converters
< Products
< Products
< Products
< Silicon IP
< Markets
< Silicon IP
Newsletter
< Silicon IP
Customer Success
< Silicon IP
News
< Resources
< Resources
< main menu
< Software Integrity
Polaris Platform
Comprehensive application security from developer to deployment
< Software Integrity
< Software Integrity
< Software Integrity
Professional Services
Strategy and programs that address security before, during and after development
< Software Integrity
< Tools
< Tools
< Tools
< Tools
< Software Integrity
< Services
Managed Security Testing
Managed SAST
Dynamic Analysis (DAST)
Penetration Testing
Mobile Application Security Testing
Network Security Testing
< Services
Professional Services
Strategy and Planning
Architecture & Design
DevSecOps Integration
Cloud Security
Industry Solutions
< Services
< Software Integrity
< Training
< Training
Product Education
< Training
Community
< Software Integrity
< Solutions
< Solutions
< Resources
< Resources
< Software Integrity
< Software Integrity
Customers
< Partners
< Partners
Become a partner
< Software Integrity
< Software Integrity
Blog
< main menu
< About Us
Company
< About Us
< About Us
About Us
About Us
< Investor Relations
< About Us
Investor Relations
Investor Relations
< Community
< About Us
Community
Community
< Newsroom
< About Us
Newsroom
Newsroom
< Resources
< About Us
Resources
Resources
< Careers
< About Us
Careers
Careers
< main menu
SNUG 2017 Custom Compiler Lunch Videolog
Cutting FinFET Layout Tasks from Days to Hours
The 2017 SNUG Silicon Valley Lunch & Learn presentations focused on how customers are using Custom Compiler to improve design productivity for FinFET.
The pioneering visually-assisted automation of Custom Compiler can cut layout tasks from days to hours. FinFET devices have added significant complexity to the design flow, and many companies are seeking new solutions for custom design.
On March 23, 2017, Synopsys hosted a Custom Compiler Lunch & Learn at SNUG in Santa Clara, CA. At this event, several industry leaders presented their experiences meeting the challenges of FinFET custom design, and discussed how they have deployed Synopsys Custom Compiler to improve their custom design productivity for FinFET.
Event Emcee
Dave Reed
Director of Marketing, Synopsys
Improving Memory Compiler Development Efficiency using Custom Compiler
Sachin Gulyani
Sr. Manager, Embedded Memories Group, STMicroelectronics
Layout Productivity Boost with Custom Compiler
Jay Yu
Director, Analog Design & Circuit Technology, MediaTek
Adoption of Custom Compiler Co-Design with IC Compiler II for In-Vehicle Designs
Shinichiro Oshige
Sr. Manager, Renesas Electronics
IP Development using Custom Compiler: Accelerating FinFET Layout
Bob Lefferts
Group Director, Mixed-signal IP, Synopsys