Test Panel at SNUG India 2016

Robert Ruiz Announcing TetraMAX II

Watch these videos of our Test Panel at SNUG India to learn about Synopsys’ new ATPG solution TetraMax II from Test experts from Synopsys, Broadcom, STMicroelectronics and Toshiba. A presenter from SGS-TÜV Saar GmbH also discusses ISO 26262 certification.

Under the Hood – TetraMAX II ATPG

Robert Ruiz, Director, Marketing, Test Automation, 
Synopsys 

TetraMAX II ATPG: Broadcom’s Results and Experience

Balakrishna Chajya Naik 
Broadcom Limited

Faster Pattern Generation Using TetraMAX II

Shiv Kumar Vats, DFT Design Engineer
STMicroelectronics

Using TetraMAX II to Meet SoC Quality Goals in Less Time

Ryoji Kusano, Chief Engineer of DFT
Toshiba

TetraMAX II Qualification According to ISO 26262

Gudrun Neumann, Product Manager and Team Leader of Functional Safety Software
SGS-TÜV Saar GmbH 

Presenters:

Robert Ruiz

Synopsys
Robert Ruiz is the Director of Product Marketing for the test automation products at Synopsys, Inc. Robert has held various marketing and technical positions for the test automation and functional verification products at Synopsys, Novas Software and Viewlogic Systems. His background includes over 17 years in advanced design-for-test methodologies as well as several years as an ASIC designer. Robert has a BSEE from Stanford University. 

Balakrishna Chajya-Naik

Broadcom
Balakrishna Naik has over 16 years of industry experience in the area of DFT. He is currently working in Broadcom’s ASIC Products Division, Bangalore where he is involved with the implementation of DFT for several ASIC designs. Prior to joining Broadcom, he worked at Texas Instruments (TI) and Purple Vision Technologies. At TI, Balu worked in the ASIC and later Micro Controller Unit (MCU) divisions and was involved with DFT aspects on over 20 designs.

Shiv Kumar

STMicroelectronics 
Shiv Kumar received a Btech degree in Electronics and Communication from GuruGobind Singh Indraprastha University Delhi. He has over 9 years’ industry design experience, including 5 years with the ST’s APG DFT team. He is now working on next-generation automotive chips, employing the latest DFT architecture and techniques. Shiv’s main area of interest is low power DFT, and he has authored or co-authored papers presented at DAC and the VLSI Design Conference. 

Ryoji Kusano

Toshiba 
Mr. Ryoji Kusano received his BSEE from Tohoku University, Japan. He has worked at Toshiba Corporation, Storage and Electronic Devices Solutions Company for 22 years. Currently, Mr. Kusano is chief engineer of DFT at Toshiba. 

Gudrun Neumann

SGS-TÜV Saar GmbH
Gudrun Neumann received her Informatics degree at Technical University Munich in 1990. Ms. Neumann is concentrated on Functional Safety of safety-relevant controls, focusing since 2005 on software in the areas of automotive, machinery, industry, household and medical devices. She has been Product Manager of Software at SGS-TÜV Saar GmbH since 2010 and team leader of the Functional Safety software team since 2012. In this capacity, she is responsible for standard compliance definition and implementation of analyses and assessments of complex software systems. Based on many years of practice, she offers training in the application of Functional Safety standards and carries out workshops for safety-relevant software development.