International Test Conference 2019

Washington, DC

Synopsys 27th Annual Test Special Interest Group (SIG) Event

Synopsys customers are invited to attend our 27th Annual Test SIG event at the International Test Conference (ITC) 2019. This year’s agenda includes presentations from leading companies, which will describe how they are using the latest capabilities in Synopsys’ comprehensive test and yield solutions and the benefits they are seeing. 

Monday, November 11th, 6:00 PM - 9:30 PM

OMNI Hotel
2500 Calvert St NW
Washington, DC 20008


Welcome Reception
Opening by Dr. Aart de Geus, Chairman and co-CEO
Dinner and Presentations
• Intel
• Samsung
• Avera Semiconductor
• Advantest
Dessert and Prize Drawing

Visit Synopsys at ITC

The Synopsys TestMAX® family contains unique capabilities for automotive test and functional safety as well as technologies that unlock new levels of test bandwidth and efficiency including leverage of high-speed interfaces common on many designs. Visit Synopsys in booth #301. 

Tuesday Morning Keynote

Aart de Geus, Chairman & CoCEO, Synopsys
“50 Years… Good Start!”

Tutorials and Panel Sessions

  • Nov 11 Tutorial: Memory Test and Repair in FinFET Era, Yervant Zorian (Synopsys)
  • Nov 11 Tutorial: Automotive Reliability & Test Strategies, Riccardo Mariani (Intel), Yervant Zorian (Synopsys)
  • Nov 12 Session 3, 17:00-18:30: CAD for Security – A Look Ahead for 5 Years and Beyond, Mike Borza, Synopsys
  • Nov 13 Poster 25, 11:30-13:30: PS-XLBIST: Per-Shift X-Tolerant Logic BIST, Peter Wohl (Synopsys), John Waicukauski (Synopsys) and Frederic Neuveux (Synopsys). 
  • Nov 13 Session w5, 15:00-16:30: Machine Learning-Based DFT Recommendation System for ATPG QOR, Apik Zorian, Basim Shanyour, and Milir Vaseekar, Synopsys Inc.,
  • Nov 13 Session w2 Panel, 17:00-18:30: 3D Chip Products Are Now Really Taking Off: Is The Test Community Ready For It?, Adam Cron – DfT Expert, Chair of IEEE Std P1838 – Synopsys (GA, USA)
  • Nov 13 Session w4 Panel, 17:00-18:30: Meeting Automotive Quality & Safety Requirements, Yervant Zorian, Synopsys
  • Nov 14 Session w4 Panel, 14:30-16:00:  Memory FIT Rate Mitigation Technique for Automotive SoCs,  G. Boschi, H. Shaheen, D. Luongo, D. Lazzarotti, Intel, H. Grigoryan, G. Harutyunyan , S. Shoukourian, Synopsys   
  • Nov 14-15: Automotive Reliability and Test Workshop