EDA Group Manager, Panasonic
Kobayashi-san is responsible for the EDA group supporting the design team. He has worked for Panasonic Industrial Devices Systems and Technology Company for 14 years, with particular emphasis on place-and-route. He has successfully led many digital physical implementation projects, including mobile phone LSI place-and-route, audio LSI, and SoCs. During his tenure at Panasonic, he has worked closely with Synopsys, and has recently completed the place-and-route tool migration to IC Compiler II.
Kobayashi-san earned his Bachelor of Engineering degree at Hosei University of Japan.
Dr. François Lémery
CAD Project Manager, STMicroelectronics
François is a CAD Project Manager at STMicroelectronics currently responsible for the deployment of Custom Compiler within the R&D library group. For the past 25 years, he has been an analog R&D engineer focused on behavioral modeling, mixed-signal simulation, FastSPICE simulation, RF simulation, optimization, parasitic extraction of interconnects, IR drop and electromigration, and layout placement and routing, always with the objective to help designers improve their productivity.
François earned his Engineering degree from the École Central of Lyon and his PhD in Microelectronics from the Institut National Polytechnic of Grenoble on the subject of “Behavioural Modelling of Analog and Mixed-Signal Circuits”.
Dr. Gernot Koch
CAD Manager, TDK-Micronas
Dr. Koch joined Micronas, which is now part of TDK, in 2003 as a CAD engineer specializing in system-level design, analog and digital verification, and PDKs. He has managed the CAD team at Micronas since 2009. Prior to that, he spent 5 years developing EDA tools at Synopsys, Bridges2Silicon, and Synplicity.
Dr. Koch earned his Masters in Computer Science from Karlsruhe Institute of Technology (KIT) and a Doctorate in Computer Science from the University of Tübingen.