AI is transforming the world around us, creating an avenue to innovation across all sectors of the global economy. Today, AI can interact with humans through natural language; identify bank fraud and protect computer networks; drive cars around city streets; and play complex games like chess and Go. Machine-learning is offering solutions to many complex problems around us where analytical solutions may be too expensive or practically impossible. How about chip design? Can ML offer solutions to key problems in semiconductor engineering?

A Deluge of Design Challenges

Over the years, the EDA industry has offered many solutions in the modeling and design creation of complex systems. Most design problems in EDA are NP-hard; there are simply no polynomial-time algorithms to solve these problems and hence an optimal solution cannot be identified analytically. Today’s EDA systems are finding it difficult to keep up with advanced process node requirements due to a deluge of new design challenges (figure 1).

To make things worse, these requirements are interdependent and need to be considered concurrently across multiple planes of design optimization. The actual application and techniques used depend highly on each specific problem space. How does one prepare a general solution for a specific problem when there is limited access to the design environment?


AI-enhanced Design Tools that Learn and Improve

Machine-learning (ML) offers opportunities to enable self-optimizing design tools. Very much like self-driving cars that observe real-world interactions to improve their responses in different (local) driving conditions, AI-enhanced tools are able to learn and improve in (local) design environments after deployment. These new capabilities can be embedded in different design engines, giving EDA developers a new arsenal of solutions for today’s demanding semiconductor design environment.

Example: Fast Delay Prediction during Optimization

Advanced-node complex physical effects & foundry rules can impact design convergence. A variety of modeling capabilities for signal integrity, waveform propagation, noise, etc. exist that accurately calculate delay. However, these capabilities are computationally expensive and need to be used with care during pre-route design steps. An ML Delay Predictor is a statistical model that can be trained to capture the correlation of pre- to post-route timing at multiple stages of design evolution, offering upstream engines faster visibility into complex downstream effects, and enabling better decisions. The delay predictor improves design convergence and accelerates design evolution towards better PPA (figure 2).

Machine Learning Enabled Optimization

Extending the ML Predictor Paradigm

An entire class of ML Predictors can look for DRC hotspots, EM/IR distribution, and much more. Additional classes of ML models offer a variety of benefits to self-optimizing design tools (figure 3):

-          ML Optimizers: Supervised ML that learns prior optimization moves and directly applies them to relevant design topologies, with applications in ECO, buffering, Vt selection, and DRC repair

-          ML Classifiers: Unsupervised ML that facilitates more efficient algorithm selection, accelerating overall runtime and enabling new applications in circuit design, test and yield analysis

-          ML Schedulers: Exploration technology that gives tools better understanding of their execution environment and tailors their needs to available compute resources

These engines can be pre-trained up-front or allowed to self-train during design. They continuously learn and improve in the design environment to enable faster time-to-results with better QoR.

Next: An AI-enhanced Design Platform

Synopsys introduced the industry’s first AI-enhanced tool (Primetime ECO) in 2018. We have since steadily continued to introduce new ML models in our design platforms that enable better QoR and faster turnaround time for tough design problems. Today, there are many ML models in Synopsys AI-enhanced tools in the areas of digital implementation, circuit simulation, test, physical verification, and signoff – with many more planned to be released in 2020. We are executing towards a clear vision for the AI-enhanced Fusion Design Platform: An orchestrated, self-optimizing design environment that will go well beyond single-model solutions and deliver even better end-to-end QoR across the design environment – with ML-Everywhere!