IC Validator is a comprehensive signoff DRC / LVS tool architected and proven for In-Design physical verification at leading-edge process nodes. It delivers excellent scalability, superior ease-of-use for the physical designer, and high programmability for easier runset development.
IC Validator’s high performance DRC and LVS physical verification engine substantially reduces the time to results through near-linear scalability across multiple CPU cores. Programmable, extended electrical rule checking (EERC) adds reliablility verification.
IC Validator is seamlessly integrated with IC Compiler II for In-Design physical verification. This award-winning technology accelerates design closure for manufacturing by enabling independent signoff quality analysis and automatic repair within the implementation environment.
IC Validator is fully certified and silicon proven by major foundries and IDMs for physical signoff.