Infineon | Synopsys
Technology Symposium

Advancements in AI for EDA are playing a key role in addressing challenges posed by advanced node complexity, aggressive time-to-market targets, increasing manufacturing test costs, and the global engineering resource crunch. The session will discuss how pervasive AI is delivering significant QOR and productivity improvement across implementation, verification, and test. Solutions that will be covered include DSO.ai, VSO.ai and TSO.ai that will help  unlock new levels of productivity.

Synopsys’ unified functional safety  platform is a complete solution that brings together best-in-class technologies for FMEA, FMEDA and fault campaign management under a single unified flow. Early functional safety analysis can quickly identify candidates for TMR and DCLS redundancy and estimate metrics for target ASILs. Comprehensive digital/analog fault injection and simulation can be performed to produce reliable metrics for final analysis and roll-up. Systematic faults are addressed by Synopsys best-in-class functional verification tools, now with the traceability of safety requirements to the verification plan, as well as full testbench qualification.

Overview of the Synopsys end-to-end energy efficiency solution, a ‘shift-left’ methodology from architecture to emulation power analysis and then to RTL, implementation, and signoff.

Advancements in AI for EDA are playing a key role in addressing challenges posed by advanced node complexity, aggressive time-to-market targets, increasing manufacturing test costs, and the global engineering resource crunch. The session will discuss how pervasive AI is delivering significant QOR and productivity improvement across implementation, verification, and test. Solutions that will be covered include DSO.ai, VSO.ai and TSO.ai that will help  unlock new levels of productivity.

Synopsys’ unified functional safety  platform is a complete solution that brings together best-in-class technologies for FMEA, FMEDA and fault campaign management under a single unified flow. Early functional safety analysis can quickly identify candidates for TMR and DCLS redundancy and estimate metrics for target ASILs. Comprehensive digital/analog fault injection and simulation can be performed to produce reliable metrics for final analysis and roll-up. Systematic faults are addressed by Synopsys best-in-class functional verification tools, now with the traceability of safety requirements to the verification plan, as well as full testbench qualification.

Overview of the Synopsys end-to-end energy efficiency solution, a ‘shift-left’ methodology from architecture to emulation power analysis and then to RTL, implementation, and signoff.

The automotive industry is experiencing a shift in EE system architectures which will impact automakers, Tier 1, and Tier 2 suppliers over the next 10 years. The new EE system architecture, called “zonal architecture,” will alter both hardware systems and the associated software stacks, and is transitioning from legacy distributed ECU systems to domain-based architecture and ultimately to zonal architecture. In this presentation, we will discuss the SoC implications of this shift and how it will direct IP development and selection

Bluetooth Low Energy is now in the majority of electronic devices we use on a daily basis. Whether BLE is used as the primary wireless interface or to wirelessly access the device for set-up, provisioning and maintenance, Bluetooth has quickly become just another standard interface on a SoCs. This presentation will address a multitude of Bluetooth use cases and discuss how recent and future enhancements to Bluetooth standards will continue to drive the explosive rate of adoption. Synopsys production proven BLE and 802.15.4 wireless IP can easily and seamlessly be integrated into SoCs by reducing the complexity and risk while accelerating time-to-market

AI applications are driving the need for more efficient Neural Network processing across a broad range of performance, power and price points, leading to various processor-based implementation options, such as selecting an AI-enabled DSP or adding a dedicated AI accelerator. We will discuss tradeoffs of the different options and show AI-enabled ARC processors including Synopsys ARC VPX DSPs and accelerators, as well as the ARC NPX Neural Processing Units (NPUs). We will also discuss the importance of software support across processors will be covered

Automotive applications are becoming increasingly complex and require high levels of precision and accuracy in terms of algorithms and data formats. As algorithm complexity grows, system architects are developing their algorithms with tools such as MATLAB, which work in high-precision data formats such as half and single precision floating point. The Synopsys ARC VPX DSP Family is optimized for the unique power, performance and area (PPA) requirements of these computation intensive applications. However, powerful software development and programming tools are needed to ease DSP development and maximize application performance. We will discuss the Synopsys ARC MetaWare MX Development Tools, a complete suite of tools, SDKs, runtime software and libraries that provide everything needed to program ARC VPX DSPs, and we will provide tips and tricks on how to most effectively program your ARC VPX DSP