Cloud native EDA tools & pre-optimized hardware platforms
Synopsys and Infineon are hosting a two-day Symposium live and in-person at Am Campeon. This event will be held on 28th and 29th June 2023: Session will also be accessible via Webex.
The Symposium promises to be an informative and productive event running across four tracks:
Track One
Implementation and Signoff
Track Two
Verification
Track Three
AMS and Technology Development
Track Four
IP and Silicon Lifecycle Management
We look forward to sharing information about new and exciting EDA, IP and FuSa Technologies from Synopsys.
Places are limited so please sign up now.
Track 1 - Implementation and Signoff
28.6.2023 9:00-16:15
Session Details: Learn about the technologies that enable shift left in design methodology, delivering maximum PPA entitlement and significant productivity benefits across the entire RTL-to-signoff flow.
Track 2 - Verification
28.6.2023 9:00-16:15
Session Details: Achieve fastest turnaround time with industry leading verification, debug, RTL static signoff, Low Power technologies, and silicon-proven Verification IP. The fastest emulation system on the market for earlier software bring-up, and validation of the entire system with Virtual prototyping and Platform Architect.
Track 3 - Analog/Mixed Signal Design
& Technology Development
29.06.2023 9:00-16:15
Session Details: State of the art Custom Design Family is a unified suite of design and verification tools that accelerates the development of robust analog and mixed-signal designs. The family features Custom Compiler™, a fast, easy-to-use design, and layout solution, PrimeSim™ solution which delivers industry-leading circuit simulation performance, and best-in-class technologies for parasitic extraction, reliability analysis, and physical verification.
This track also provides an overview of the Synopsys roadmap and development directions for Sentaurus TCAD, QuantumATK, TCAD-to-SPICE and Power DTCO solutions. Early Process Development, Advanced Lithography and Yield Management to optimize tradeoffs between speed, area, power, test, and yield.
SLM Production and Process Analytics is a unique analytics solution spanning design and product manufacturing phases as part of the Synopsys Silicon Lifecycle Management (SLM) family. The solution automatically highlights silicon data outliers, enabling engineering teams to quickly identify and correct underlying issues in the semiconductor supply chain.
Track 4 - IP & Silicon Lifecycle management
29.06.2023 9:00-16:15
Session Details: High-quality, silicon-proven semiconductor IP solutions for SoC designs. The broad DesignWare IP portfolio includes logic libraries, embedded memories, analog IP, wired and wireless interface IP, security IP, embedded processors and subsystems.CoreTools session will provide overview methodology to enable IP reuse.
Integrated Silicon Lifecycle Management (SLM) family of products improves silicon health and operational metrics at every phase of the device lifecycle. Synopsys SLM family of products is built on a foundation of enriched in-chip observability, analytics and integrated automation. Monitors enable deep insights from silicon to system. Meaningful data is gathered at every opportunity for continuous analysis and actionable feedback.
Closing Session and Networking reception
28.06.2023 16:15-17:30
29.06.2023 16:15-17:30
Session Details: Closing statements and Networking reception with Infineon and Synopsys colleagues
Sassine Ghazi, President & COO, Synopsys