Design Automation Conference 

December 5 - 9, 2021
San Francisco, CA

Hybrid Experience

Sessions Spotlight

Hear from Synopsys speakers at a variety of venues throughout the conference.

Monday, December 6
10:30 a.m. - 12:00 p.m. PST

Monday, December 6
10:30 a.m. - 12:00 p.m. PST

Monday, December 6
1:30 p.m. - 3:00 p.m. PST

Monday, December 6
2:00 p.m. - 2:45 p.m. PST


Monday, December 6
2:30 p.m. - 3:15 p.m. PST

Monday, December 6
3:00 p.m. - 3:45 p.m. PST

Practical Application of AI/ML to EDA Problems
Speakers: Boon-Siang Cheah, Pei-ju Hsu

Getting Started on Cloud Playbook
Panelist: Sridhar Panchapakesan

IP Enabling the Intended Function. The Unloved IP.
Speakers: Adam Cron, Randy Fish

Trust and Verify. Overcoming Costly and Piecemeal Approaches to Pre-silicon Side-channel Attack Vulnerability Analysis and Verification
Panelist: Mike Borza
Location: DAC Pavilion

Synopsys: Accelerating Cloud Adoption in EDA
Speakers: Teng-Kiat Lee, Sridhar Panchapakesan
Location: Design Infrastructure Alley (DIA)

Delivering Systemic Innovation to Power the Era of SysMoore
Speaker: Neeraj Kaul
Location: DAC Pavilion

Tuesday, December 7
5:00 p.m. - 6:00 p.m. PST

Optimizing Fault Simulations with Formal Analysis for Asil Compliance
Speakers: Jiri Prevratil, Tareq Altakrouri

Wednesday, December 8
10:30 a.m. - 12:00 p.m. PST

Wednesday, December 8
1:30 p.m. - 8:00 p.m. PST

Wednesday, December 8
2:30 p.m. - 3:00 p.m.

Wednesday, December 8
3:50 p.m. - 4:10 p.m. PST

Wednesday, December 8
4:00 p.m. - 4:30 p.m. PST

Wednesday, December 8
4:10 p.m. - 4:30 p.m. PST

Wednesday, December 8
5:00 p.m. - 6:00 p.m. PST

UVM: Where the Wild Things Are
Speaker: Hillel Miller

Identifying Security Weaknesses in Electronic Designs using a Standardized Methodology 
Speaker: Mike Borza

RL-Sizer: VLSI Gate Sizing for Timing Optimization using Deep Reinforcement Learning
Speaker: Vishal Khandelwal

SLAP: A Supervised Learning Approach for Priority Cuts Technology Mapping
Speaker: Luca Amaru

End-to-End Secure SoC Lifecycle Management
Speaker: Mike Borza

LUT-Based Optimization For ASIC Design Flow
Speakers: Luca Amaru, Jovanka Ciric Vujkovic

Enhanced Hyperscaling of Data Centers using In-Chip Monitoring & Sensing Fabrics
Speaker: Firooz Massoudi

Analog Fault Simulation for Automotive Sensor Designs
Speakers: Sungjin Park, Kwangsoo Seo

Deep Integration of Circuit Simulator and SAT Solver
Speaker: Luca Amaru

Designing IP To Achieve Optimal Low Power Using Protocol Defined Low Power States
Speakers: Saleem Mohammad, Shivakumar Chonnad

Diagnostic Coverage of Memory IP with Fault Injection Simulation using TestMAX CustomFault Simulator
Speaker: Rakesh Panemangalore Shenoy

Efficient Data Exchange Towards Faster Functional Safety Development
Speakers: Shivakumar Chonnad, Vladimir Litovtchenko

Silicon Debugging Using Function Failure Oriented Path Delay Fault Vectors
Speakers: Khader Abdel-Hafez, Girish Patankar, Ruifeng Guo, Tae-Jin Jung, YongJoon Kim

Subresolution Assist Feature Insertion by Variational Adversarial Active Learning and Clustering with Data Point Retrieval
Speaker: James P. Shiely



Sponsored by Intel and Synopsys

HACK@DAC is a hardware security challenge contest, co-located with the Design and Automation Conference (DAC), for finding and exploiting security-critical vulnerabilities in hardware and firmware. In this competition, participants compete to identify the security vulnerabilities, implement the related exploits, propose mitigation techniques or patches, and report them. The participants are encouraged to use any tools and techniques with a focus on theory, tooling, and automation.

The contest mimics real-world scenarios where security engineers have to find vulnerabilities in the given design. The vulnerabilities are diverse and range from data corruption to leaking sensitive information leading to compromise of the entire computing platform. The open-source SoC riddled with security vulnerabilities has been co-developed by Intel, the Technical University of Darmstadt, and Texas A&M University.  

  • October 4, 2021: Phase I starts
  • November 19, 2021: Phase I ends and final submissions are due
  • December 5-6, 2021: Phase II live at DAC
  • December 7-9, 2021: Winners will be announced during DAC Awards Ceremony

2021 Marie R. Pistilli Award Recipient

Congratulations to Renu Mehra!

The Marie R. Pistilli Women in Electronic Design Award is a prestigious annual honor that recognizes individuals who have visibly helped to advance women in electronic design. The award is named for the late Marie R. Pistilli, former organizer of DAC, who placed a high value on equality, diversity, and acceptance.

Renu Mehra is R&D Group Director for the Digital Design Group at Synopsys and heads the Design Compiler R&D Team. She is an organizational leader responsible for many advanced technologies including RTL synthesis and optimization, clock gating, constraint management, multi-voltage designs, power management approaches, and congestion, power, and runtime optimizations.

Young Fellows Program

The Young Fellows Program at DAC is specifically designed to kickstart young students in the field of EDA. DAC Fellows will not only enjoy free access to the DAC conference, but also participate in a unique hands-on HLS lab, live interaction with experts from large EDA companies, career coaching and much more. This elaborate program is free of charge for students. It is funded by the Design Automation Conference with support from Synopsys and other EDA companies. Find out what to expect as a DAC fellow at The Young Fellows Program 2021.


Ph.D. Forum at DAC

The Ph.D. Forum at DAC is a poster session hosted by ACM SIGDA for Ph.D. students to present and discuss their dissertation research with people in the EDA community. It has become one of the premier forums for Ph.D. students in design automation to get feedback on their research and for industry to see academic work in progress: hundreds of people attended the last forums. Visit the Ph.D Forum at DAC website for additional information.

Synopsys Lounge

  • Grab a cup of coffee on us as you are perusing the conference program
  • Relax and recharge using our convenient charging stations
  • Scan your badge using our touchless kiosk