DesignWare OTP SiPROM IP

DesignWare One-Time Programmable (OTP) SiPROM Non-Volatile Memory (NVM) IP is available in a broad range of process nodes and densities up to 512 Kbits per macro. Multiple macros can be used for higher memory capacity, making SiPROM an ideal and field-programmable replacement for masked ROM and, in certain applications, external Flash memory. Designers can choose between four read modes to trade off memory density, read access time, enhanced reliability and enhanced security, and different read modes may be combined in the same macro.

DesignWare OTP SiPROM IP contains a built-in charge pump, which provides the voltage necessary to program the memory in the field after the chip is packaged. Alternately, programming voltage may be supplied externally through a pad on the chip.

Other SiPROM features include:

  • Row Redundancy: All SiPROM macrocells integrate a row repair mechanism. Once set up, any defect repairs are transparent to the application.
  • Boot Row Register: The boot row register gives the user an additional set of parallel outputs, which can be used to control security locks, macrocell access, emulated multiple-time programmability (eMTP), or any other customer defined options that need to be available immediately after power-up or reset.
  • Security Locks: This allows the user to disable the programming of the macrocell or a sector in the macrocell. In a typical application, the security lock pins are directly connected to the boot register pins and can lock programming access throughout macrocell power-up.
  • Mask ROM Option: SiPROM macros can be converted into mask-programmable ROMs with a single mask change. The user has the flexibility to mask program the entire memory or individual portions of the macrocell. This feature gives the customer the ability to mask program a section of the memory while allowing other sections of the memory to be programmed in the field.

SiPROM uses include HDCP secure encryption key storage, analog trimming and calibration, boot code and firmware storage, Chip ID, RFID, and other mobile and wireless, medical, and automotive applications.

DesignWare NVM IP Complete Solution
DesignWare One-Time Programmable SiPROM Non-Volatile Memory IP


  • OTP Features
    • Retention exceeding 10 years (100% duty cycle)
    • Standard CMOS process
    • Highly secure
    • Fast read access
    • Multiple read modes
    • Flexible mask ROM option
    • Optional serial test port
    • Built-in test modes
  • SiPROM Features
    • Integrated charge pump for field programming
    • Row redundancy for defective cell/row repair
    • Differential and 100% redundant read modes
    • Hierarchical bank/block/sector organization
    • Boot block and a special boot register for macrocell access control