Synopsys IP for Serial ATA (SATA) Device Controller is compliant with the SATA v3.3 (backwards compatible to SATA 2.6) and PIPE v4.3 specifications supporting 1.5, 3 and 6Gb/sec operation, ensuring scalability and reuse in current and future system-on-chip (SoC) designs. The Synopsys SATA digital device controller offers an integrated DMA with a well-defined, flexible programming model that minimizes software overhead, ensuring maximum operational performance. Sample device firmware for various applications is available, speeding system integration. The solution has passed the SATA-IO Building Block Interoperability Testing, the golden standard of compliance to the SATA Specification.
The Synopsys SATA device core IP configuration offers one-click integration with the Synopsys SATA PHY IP, removing the effort of integrating the digital and mixed-signal portions of the SATA interface design. Reduced gate count and very low power consumption is achieved by utilizing the set of highly configurable options which enable the core to be optimized based on the exact design requirements. The test environment for the Synopsys SATA digital device controller IP includes a number of the Synopsys Verification IP components offering SATA transactions generation, SATA protocol monitoring and AMBA subsystem transaction generation. Verilog-based tests are provided as examples to accelerate system integration. You can view all Synopsys SATA videos here.Synopsys SATA Complete Solution Datasheet
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