Synopsys DesignWare HDMI 1.3 Transmitter (TX) IP Solution

Synopsys' DesignWare® HDMI™ 1.3 Transmitter (TX) controller and PHY IP solution provides the necessary logic to implement and verify designs for various consumer electronic applications. The HDMI 1.3 TX IP solution is silicon-proven and includes a suite of configurable digital controllers and high-speed, mixed signal PHY IP, thus providing a comprehensive solution from a single IP vendor. Synopsys lowers integration risk by ensuring that all the IP functions seamlessly together. Synopsys' DesignWare HDMI 1.3 TX IP provides designers with a high-performance HDMI IP source solution that is extremely low in power and area. The DesignWare HDMI 1.3 TX IP is fully compliant to the HDMI 1.3 specification and has gone through extensive in-house and third-party interoperability testing. With multiple design wins and products shipping in volume, Synopsys' expertise in developing and supporting its DesignWare HDMI 1.3 TX IP source solution enables designers to achieve silicon success for their advanced HDMI solutions. The strict quality measures combined with support from expert technical team enables designers to accelerate time-to-market and reduce integration risk for next-generation consumer electronic applications.

DesignWare IP for HDMI 2.0 and 1.4 TX IP Solutions Datasheet

Silicon-proven DesignWare® HDMI TX Controller and PHY IP on Synopsys' HAPS-51 Platform

Synopsys shows how fixed video and audio patterns are transmitted by the DesignWare HDMI TX controller and PHY. See the image quality improve as resolution of video test pattern is increased from 480p to 720p to 1080p, 60 Hz frame formats. Also see the EDID info collected by TX Controller/PHY Display Data Channel (DDC) from the sink device (DTV) to support negotiation and find the best supported color format and frame rate.

 

Highlights
  • A superior analog front end that supports up to 20 feet category 2-certified HDMI cables, while maintaining high performance
  • Digital controllers delivered in configurable RTL allows designers to optimize gate count and power consumption by choosing only the features required in their application
  • PHY offers low power consumption and small die area
  • Numerous optional features such as High-bandwidth Digital Content Protection (HDCP) encryption engine, audio formats, audio DMA engine and system-bus interfaces help to ease the integration effort
  • Compliance with HDMI and HDCP specifications with certification from the NXP HDMI authorized testing center and successful interoperability results from HDCP plugfest events
  • System validation based on the Synopsys Confirma HAPS-51 rapid prototyping platform